AD9882KST-140 Analog Devices Inc, AD9882KST-140 Datasheet - Page 19

• Manufacturer Part Number: AD9882KST-140
• Description: IC INTERFACE/DVI 100MHZ 100LQFP
• Manufacturer: Analog Devices Inc

Specifications of AD9882KST-140

• Rohs Status: RoHS non-compliant
• Applications: Video
• Interface: Analog, DVI
• Voltage - Supply: 3.15 V ~ 3.45 V
• Package / Case: 100-LQFP
• Mounting Type: Surface Mount

THEORY OF OPERATION: DIGITAL INTERFACE
Table 11. Digital Interface Pin List
Pin Type
Digital Video Data
Inputs
Digital Video Clock
Inputs
Termination Control
Outputs
HDCP
Power Supply
DIGITAL INTERFACE PIN DESCRIPTIONS
Digital Data Inputs
R
R
R
R
R
R
These six pins receive three pairs of differential, low voltage
swing input pixel data from a DVI transmitter.
Digital Clock Inputs
R
R
These two pins receive the differential, low voltage swing input
pixel clock from a DVI transmitter.
X0+
X0–
X1+
X1–
X2+
X2–
XC+
XC–
Positive Differential Input Data (Channel 0)
Negative Differential Input Data (Channel 0)
Positive Differential Input Data (Channel 1)
Negative Differential Input Data (Channel 1)
Positive Differential Input Data (Channel 2)
Negative Differential Input Data (Channel 2)
Positive Differential Input Clock
Negative Differential Input Clock
Mnemonic
R
R
R
R
R
R
R
R
R
DE
HSOUT
VSOUT
CTL0, CTL1, CTL2, CTL3
DDCSCL
DDCSDA
MCL
MDA
V
PV
V
GND
X0+
X0–
X1+
X1–
X2+
X2–
XC+
XC–
TERM
D
DD
D
Function
Digital input Channel 0 true
Digital input Channel 0 complement
Digital input Channel 1 true
Digital input Channel 1 complement
Digital input Channel 2 true
Digital input Channel 2 Complement
Digital data clock true
Digital data clock complement
Control pin for setting the internal termination
resistance
Data enable
Hsync output
Vsync output
Decoded control bit outputs
HDCP slave serial port data clock
HDCP slave serial port data I/O
HDCP master serial port data clock
HDCP master serial port data I/O
Main power supply
PLL power Supply
Output power supply
Ground supply
Rev. 0 | Page 19 of 40
Termination Control
R
This pin is used to set the termination resistance for all of the
digital interface high speed inputs. To set, place a resistor of
value equal to 10× the desired input termination resistance
between this pin (Pin 28) and ground supply. Typically, the
value of this resistor should be 500 Ω.
Outputs
DE—Data Enable Output
This pin outputs the state of data enable (DE). The AD9882A
decodes DE from the incoming stream of data. The DE signal is
high during active video and is low while there is no active
video.
DDCSCL—HDCP Slave Serial Port Data Clock
Used for communicating with the HDCP-enabled DVI
transmitter.
DDCSDA—HDCP Slave Serial Port I/O
For use in communicating with the HDCP-enabled DVI
transmitter.
TERM
—Internal Termination Set Pin
Value
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.15 V to 3.45 V
3.15 V to 3.45 V
2.2 V to 3.6 V
0 V
AD9882A
Pin
Number
33
32
36
35
39
38
41
42
28
86
88
87
22–25
53
54
81
82