NCV3030ADR2G ON Semiconductor, NCV3030ADR2G Datasheet - Page 21

• Manufacturer Part Number: NCV3030ADR2G
• Description: IC PWM CTLR BUCK SYNC 8SOIC
• Manufacturer: ON Semiconductor
• Series: -r

Specifications of NCV3030ADR2G

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 1.44MHz
• Duty Cycle: 84%
• Voltage - Supply: 4.7 V ~ 28 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Compensation Type II
Components of the Type II (Figure 34) network can be
specified by the following equations:
and gm is the transconductance error amplifier gain.
Capacitor C
Compensation Type III
electrolytic, so the zero of the output LC filter goes to a
higher frequency above the zero crossover frequency. This
requires a Type III compensation network as shown in
Figure 35.
compensation network. Method I is ideal for tantalum
output capacitors, which have a higher ESR than ceramic:
This compensation is suitable for electrolytic capacitors.
V
Tantalum and ceramics capacitors have lower ESR than
There are two methods to select the zeros and poles of this
RAMP
is the peak−to−peak voltage of the oscillator ramp
R
C
C
R1 +
Figure 35. Type III Compensation
Figure 34. Type II Compensation
C2
C1
C1
C2
is optional.
+
+
+
V
2 @ p @ f
0.75 @ 2 @ p @ f
p @ R
OUT
V
ESR @ V
* V
ref
1
C1
0
@ f
ref
@ L @ V
S
1
@ R2
IN
@ V
P0
RAMP
@ R
ref
@ gm
C1
@ V
OUT
(eq. 40)
(eq. 41)
(eq. 42)
(eq. 43)
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21
Method II is better suited for ceramic capacitors that
typically have the lowest ESR available:
The remaining calculations are the same for both methods.
If the equation in Equation 59 is not true, then a higher value
of R
C1
must be selected.
R1 @ R
C
R
R1 +
R2 +
FB1
FB1
+
+
FB1
2 @ p @ C
V
f
f
f
f
R
C
C
Z2
P2
Z1
P3
OUT
2 @ p @ f
2p @ C
C1
C1
C2
R1 @ R2 @ R
) R2 @ R
+ f
+ f
+ 0.5 @ f
+ 0.5 @ f
V
u u
+
+
* V
f
f
f
f
ref
Z1
Z2
P2
P3
0
0
2 @ p @ f
2 @ p @ f
1
FB1
1
FB1
@
+ 0.75 @ f
+ f
@
+ f
+
0
ref
gm
2
@ L @ V
V
f
@ f
2
@ f
@ R1
P0
FB1
Z0
S
Z2
S
1 ) sin q max
IN
1 * sinq max
1 ) sin q max
1 * sin q max
FB1
P2
Z2
1
1
@ R
Z1
P3
) R1 @ R2
* R
@ R
RAMP
@ R
C1
P0
C1
C1
FB1
@ C
OUT
u
gm
1
(eq. 44)
(eq. 45)
(eq. 46)
(eq. 47)
(eq. 48)
(eq. 49)
(eq. 50)
(eq. 51)
(eq. 52)
(eq. 53)
(eq. 54)
(eq. 55)
(eq. 56)
(eq. 57)
(eq. 58)
(eq. 59)