PCA9502BS,157 NXP Semiconductors, PCA9502BS,157 Datasheet - Page 9

• Manufacturer Part Number: PCA9502BS,157
• Description: IC I/O EXPANDER I2C/SPI 24HVQFN
• Manufacturer: NXP Semiconductors

Specifications of PCA9502BS,157

• Interface: I²C, SPI
• Number Of I /o: 8
• Interrupt Output: No
• Frequency - Clock: 400kHz
• Voltage - Supply: 2.3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935281363157; PCA9502BS; PCA9502BS

NXP Semiconductors
PCA9502_3
Product data sheet
Fig 8. A complete data transfer
SDA
SCL
condition
START
S
When an address is sent, each device in the system compares the first seven bits after the
START with its own address. If there is a match, the device will consider itself addressed
by the master, and will send an acknowledge. The device could also determine if in this
transaction it is assigned the role of a slave receiver or slave transmitter, depending on the
R/W bit.
Each node of the I
microcontroller is of course fully programmable, while peripheral devices usually have
fixed and programmable address portions.
When the master is communicating with one device only, data transfers follow the format
of
and issuing a STOP condition, if a master would like to address some other device on the
network, it could start another transaction by issuing a new START.
Another way for a master to communicate with several different devices would be by using
a ‘repeated START’. After the last byte of the transaction was transferred, including its
acknowledge (or negative acknowledge), the master issues another START, followed by
address byte and data, without effecting a STOP. The master may communicate with a
number of different devices, combining ‘reads’ and ‘writes’. After the last transfer takes
place, the master issues a STOP and releases the bus. Possible data formats are
demonstrated in
and a change of direction, without releasing the bus. We shall see later on that the change
of direction feature can come in handy even when dealing with a single device.
In a single master system, the repeated START mechanism may be more efficient than
terminating each transfer with a STOP and starting again. In a multimaster environment,
the determination of which format is more efficient could be more complicated, as when a
master is using repeated STARTs it occupies the bus for a long time and thus preventing
other devices from initiating transfers.
address
Figure
0 to 6
8, where the R/W bit could indicate either direction. After completing the transfer
R/W
7
Figure
ACK
2
8
C-bus network has a unique seven-bit address. The address of a
Rev. 03 — 13 October 2006
9. Note that the repeated START allows for both change of a slave
0 to 6
data
7
ACK
8-bit I/O expander with I
8
0 to 6
data
7
ACK
2
8
C-bus/SPI interface
PCA9502
© NXP B.V. 2006. All rights reserved.
condition
STOP
P
002aab046
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