STMPE801QTR STMicroelectronics, STMPE801QTR Datasheet - Page 14

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STMPE801QTR

Manufacturer Part Number
STMPE801QTR
Description
IC I/O EXPANDER I2C 8B 16QFN
Manufacturer
STMicroelectronics
Datasheet

Specifications of STMPE801QTR

Interface
I²C
Number Of I /o
8
Interrupt Output
Yes
Frequency - Clock
400kHz
Voltage - Supply
1.65 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-QFN
Includes
POR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6132-2

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Turning I2C block OFF and ON
5.11
Note:
6
14/26
General call
A general call address is a transaction with the slave address of 0x00 and R/W = 0. When a
general call address is made, the device responds to this transaction with an
acknowledgement and behaves as a slave-receiver mode. The meaning of a general call
address is defined in the second byte sent by the master-transmitter.
Table 9. General call
All other second byte value will be ignored.
Turning I
STMPE801 operates entirely on the I
current consumption of the device is extremely low. However, when there are activity on the
I
address.
Host system may choose to shut-down the I
registers are required. This feature allows the current consumption to drop to the minimum.
Host system turns OFF the I
shut down on the next valid clock edge of the I
CANNOT be accessed by I
To turn ON the I
I
2
2
C bus, current consumption increases, even if the I
C block. This could be done by hardware assertion of the RESET pin.
R/W
0
0
0
Second Byte Value
2
0x06
0x04
0x00
2
C block OFF and ON
C block, system host must reset the STMPE801 in order to re-activate the
2
C, as the I
2
2-byte transaction in which the second byte tells the slave device
to reset and write (or latch in) the 1-bit programmable part of the
slave address.
2-byte transaction in which the second byte tells the slave device
not to reset and write (or latch in) the 1-bit programmable part of
the slave address.
Not allowed as second byte.
C block by writing ‘1’ into the I
2
C clock. When there are no activity on the I
2
C has shut down completely.
2
C block in the STMPE801, if no access to the
2
C clock signal. In this state, the device
2
C traffic is not directed to the assigned
Definition
2
C_SHDN bit. The I
2
C block will
STMPE801
2
C bus,

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