STMPE801QTR STMicroelectronics, STMPE801QTR Datasheet - Page 13

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STMPE801QTR

Manufacturer Part Number
STMPE801QTR
Description
IC I/O EXPANDER I2C 8B 16QFN
Manufacturer
STMicroelectronics
Datasheet

Specifications of STMPE801QTR

Interface
I²C
Number Of I /o
8
Interrupt Output
Yes
Frequency - Clock
400kHz
Voltage - Supply
1.65 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-QFN
Includes
POR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6132-2

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STMPE801
5.8
5.9
5.10
Read operation
A write is first performed to load the register address into the Address Counter but without
sending a Stop condition. Then, the bus master sends a reStart condition and repeats the
Device Address with the R/W bit set to 1. The slave device acknowledges and outputs the
content of the addressed byte. If no more data is to be read, the bus master must not
acknowledge the byte and terminates the transfer with a Stop condition.
If the bus master acknowledges the data byte, then it can continue to perform the data
reading. To terminate the stream of data byte, the bus master must not acknowledge the
last output byte and follow by a Stop condition. If the address of the register written into the
Address Counter falls within the range of addresses that has the auto-increment function,
the data being read will be coming from consecutive addresses, with the internal Address
Counter automatically increments after each byte output. After the last memory address,
the Address Counter 'rolls-over' and the device continue to output data from the memory
address of 0x00. Similarly, for the address of register that falls within non-increment range
of addresses, the output data byte comes from the same address (which is the address
pointed by the Address Counter).
Acknowledgement in read operation
For the above read command, the slave device waits, after each byte read, for an
acknowledgement during the ninth bit time. If the bus master does not drive the SDA to low
state, then the slave device terminates and switches back to its idle mode, waiting for the
next command.
Write operations
A write is first performed to load the register address into the Address Counter without
sending a Stop condition. After the bus master receives an acknowledgement from the
slave device, it may start to send a data byte to the register (pointed by the Address
Counter). The slave device again acknowledges and the bus master terminates the transfer
with a Stop condition.
If the bus master would like to continue to write more data, it can just continue write
operation without issuing the Stop condition. Whether the Address Counter auto-
increments or not after each data byte write, depends on the address of the register written
into the Address Counter. After the bus master writes the last data byte and the slave
device acknowledges the receipt of the last data, the bus master may terminates the write
operation by sending a Stop condition. When the Address Counter reaches the last
memory address, it 'rolls-over' on the next data byte write.
I2C module
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