MC145574AAC Freescale Semiconductor, MC145574AAC Datasheet - Page 69

• Manufacturer Part Number: MC145574AAC
• Description: IC TRANSCEIVER ISDN 32-LQFP
• Manufacturer: Freescale Semiconductor
• Type: Transceiverr

Specifications of MC145574AAC

• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Protocol: -
• Lead Free Status / Rohs Status: Compliant

MOTOROLA
8.1
INTRODUCTION
There are seven nibble registers (NR0 through NR6) in the MC145574. Control and status information
reside in these nibble registers, which are accessed via the SCP. For a detailed description of access
procedures, refer to Section 5. The nomenclature used in this data sheet is such that NR2(3) refers
to nibble register 2, bit 3.
The MC145574 nibble register map is compatible to the MC145474/475 nibble register map, the only
modification being the removal of bits NR6(2) and NR6(1), related to the IDL A/M FIFOs and the addi-
tion of bits (NR2(0), NR3(0), and NR4(0) for NT mode only).
NR0
NR1
NR2
NR3
NR4
NR5
NR6
NR0
NR1
NR2
NR3
NR4
NR5
NR6
Software Reset
Activation Indication
Activation Request
Change in Rx Info
State IRQ3
Enable IRQ3
Idle B1 Channel
2B+D IDL2 Loopback
Software Reset
Activation Indication
Activation Request
Change in Rx Info
State IRQ3
Enable IRQ3
Enable B1 Channel
2B+D IDL2 Loopback
Freescale Semiconductor, Inc.
(3)
(3)
Table 8–1. SCP Nibble Register Map for NT Operation
Table 8–2. SCP Nibble Register Map for TE Operation
NIBBLE REGISTER MAP DEFINITION
For More Information On This Product,
Go to: www.freescale.com
Transmit Power Down
Error Indication
Deactivation Request
Multiframe Reception
IRQ2
Enable IRQ2
Idle B2 Channel
Transmit Power–Down
Error Indication
Not Applicable
Multiframe Reception
IRQ2
Enable IRQ2
Enable B2 Channel
MC145574
(2)
(2)
Absolute Minimum Power
Not Applicable
Activation Timer T1
Expired
IRQ6 FECV Detection
Enable IRQ6
Invert B1 Channel
Absolute Minimum Power
Multiframing Detection
Activation Timer T3
Expired
D Channel Collision IRQ1
Enable IRQ1
Invert B1 Channel
(1)
(1)
Return to Normal
Frame Sync
NT Terminal Class
D Channel Collision IRQ7
NT Terminal Mode
Enable IRQ7
Invert B2 Channel
Swap B1 and B2
Return to Normal
Frame Sync
Class
Not Applicable
Not Applicable
Invert B2 Channel
Swap B1 and B2
(0)
(0)
8
8–1