MC145574AAC Freescale Semiconductor, MC145574AAC Datasheet - Page 54

• Manufacturer Part Number: MC145574AAC
• Description: IC TRANSCEIVER ISDN 32-LQFP
• Manufacturer: Freescale Semiconductor
• Type: Transceiverr

Specifications of MC145574AAC

• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Protocol: -
• Lead Free Status / Rohs Status: Compliant

Freescale Semiconductor, Inc.
6.7.1
Monitor Channel Operation
The Monitor channel is used to access the internal registers of the MC145574. All Monitor channel
messages are two bytes in length. Each byte is sent twice to permit the receiving GCI device to verify
data integrity. In ISDN applications, the Monitor channel is used for access to the S interface mainte-
nance messages. The entire register set of the MC145574 can be accessed via the Monitor channel.
The A and E bits in the GCI channel are used to control and acknowledge Monitor channel transfers
between the MC145574 and another GCI device. When the Monitor channel is inactive, the A and
E bit times from D out are both high impedance. The A and E bits are active when they are driven
to V SS during their respective bit times. Pull–up resistors are required on D in and D out . The E bit indi-
cates the transmission of a new Monitor channel byte. The A bit from the opposite direction is used
to acknowledge the Monitor channel byte transfer.
An idle Monitor channel is indicated by both A and E bits being inactive for two consecutive GCI frames.
The A and E bits are high impedance when inactive. The Monitor channel data is $FF.
The originating GCI device transmits a byte onto the Monitor channel after receiving the A and E bits
equal to 1 for at least two consecutive GCI frames. The originating GCI device also sets its outgoing
E bit to 0 in the same GCI frame as the byte that is transmitted. The transmitted byte is repeated
for at least two GCI frames, or is repeated in subsequent GCI frames until the MC145574 acknowledges
receiving two consecutive GCI frames containing the same byte.
Once the MC145574 acknowledges the first byte, the sending device sets E to high impedance and
transmits the first frame of the second byte. Then the second byte is repeated with the E bit low until
it is acknowledged. See Figure 6–3 for details of Monitor channel procedure.
The destination GCI device verifies that it has received the first byte by setting the A bit to 0 towards
the originating GCI device for at least two GCI frames. Successive bytes are acknowledged by the
receiving device setting A to high impedance on the first instance of the next byte followed by A being
cleared to 0 when the second instance of the bit is received.
If the GCI device does not receive the same Monitor channel byte in two consecutive GCI frames,
it indicates this by leaving A = 0 until two consecutive identical bytes are received. The last byte of
the sequence is indicated by the originating GCI device setting its E bit to 1 for two successive GCI
frames.
6.8
MONITOR CHANNEL MESSAGES
The MC145574 supports three basic types of Monitor channel messages. The first group of messages
are commands that read or write the internal register set of the MC145574. See Sections 8, 9, and
10 for the complete description of the MC145574 register set. The second group of messages are
responses from the MC145574. These responses are transmitted by the MC145574 after it receives
a register read or write command over the Monitor channel. The third type of Monitor channel message
is the Status Indication Message. When enabled, this message indicates a change in interrupt status
register NR3.
For More Information On This Product,
6–8
MC145574
MOTOROLA
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