DS26521L+ Maxim Integrated Products, DS26521L+ Datasheet - Page 113

IC TXRX T1/E1/J1 64-LQFP

DS26521L+

Manufacturer Part Number
DS26521L+
Description
IC TXRX T1/E1/J1 64-LQFP
Manufacturer
Maxim Integrated Products
Type
Line Interface Units (LIUs)r
Datasheet

Specifications of DS26521L+

Number Of Drivers/receivers
1/1
Protocol
T1/E1/J1
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
64-LQFP
Product
Framer
Number Of Transceivers
1
Data Rate
44.736 Mbps
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Supply Current (max)
220 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 4: Sa4 Change Detect Interrupt Mask (RSa4IM). This bit will enable the change detect interrupt for the Sa4
bits. Any change of state of the Sa4 bit will then generate an interrupt in RLS7.0 to indicate the change of state.
Bit 3: Sa5 Change Detect Interrupt Mask (RSa5IM). This bit will enable the change detect interrupt for the Sa5
bits. Any change of state of the Sa5 bit will then generate an interrupt in RLS7.0 to indicate the change of state.
Bit 2: Sa6 Change Detect Interrupt Mask (RSa6IM). This bit will enable the change detect interrupt for the Sa6
bits. Any change of state of the Sa6 bit will then generate an interrupt in RLS7.0 to indicate the change of state.
Bit 1: Sa7 Change Detect Interrupt Mask (RSa7IM). This bit will enable the change detect interrupt for the Sa7
bits. Any change of state of the Sa7 bit will then generate an interrupt in RLS7.0 to indicate the change of state.
Bit 0: Sa8 Change Detect Interrupt Mask (RSa8IM). This bit will enable the change detect interrupt for the Sa8
bits. Any change of state of the Sa8 bit will then generate an interrupt in RLS7.0 to indicate the change of state.
0 = Interrupt masked.
1 = Interrupt enabled.
0 = Interrupt masked.
1 = Interrupt enabled.
0 = Interrupt masked.
1 = Interrupt enabled.
0 = Interrupt masked.
1 = Interrupt enabled.
0 = Interrupt masked.
1 = Interrupt enabled.
7
0
E1RSAIMR (E1 Mode Only)
Receive Sa-Bit Interrupt Mask Register
014h
6
0
5
0
113 of 258
RSa4IM
4
0
RSa5IM
3
0
DS26521 Single T1/E1/J1 Transceiver
RSa6IM
2
0
RSa7IM
1
0
RSa8IM
0
0

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