PIC12F683-E/P Microchip Technology Inc., PIC12F683-E/P Datasheet - Page 91

• Manufacturer Part Number: PIC12F683-E/P
• Description: 8 PIN, 3.5 KB FLASH, 128 RAM, 6 I/O, PDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC12F683-E/P

• A/d Inputs: 4 Channel, 10-Bit
• Comparators: 1
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Frequency: 20 MHz
• Input Output: 6
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 8-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Serial Interface: None
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

12.6
For PIC12F683, the WDT has been modified from
previous PIC12F683 devices. The new WDT is code and
functionally compatible with previous PIC12F683 WDT
modules and adds a 16-bit prescaler to the WDT. This
allows the user to have a scaler value for the WDT and
TMR0 at the same time. In addition, the WDT time-out
value can be extended to 268 seconds. WDT is cleared
under certain conditions described in Table 12-7.
12.6.1
The WDT derives its time base from the 31 kHz
LFINTOSC. The LTS bit does not reflect that the
LFINTOSC is enabled.
The value of WDTCON is ‘---0 1000’ on all Resets.
This gives a nominal time base of 16 ms, which is com-
patible with the time base generated with previous
PIC12F683 microcontroller versions.
FIGURE 12-9:
TABLE 12-7:
 2004 Microchip Technology Inc.
WDTE = 0
CLRWDT Command
Oscillator Fail Detected
Exit Sleep + System Clock = T1OSC, EXTRC, INTRC, EXTCLK
Exit Sleep + System Clock = XT, HS, LP
LFINTOSC Clock
Note:
31 kHz
Watchdog Timer (WDT)
Note 1: This is the shared Timer0/WDT prescaler. See Section 5.4 “Prescaler” for more information.
WDT OSCILLATOR
When the Oscillator Start-up Timer (OST)
is invoked, the WDT is held in Reset,
because the WDT Ripple Counter is used
by the OST to perform the oscillator delay
count. When the OST count has expired,
the WDT will begin counting (if enabled).
WDT STATUS
WATCHDOG TIMER BLOCK DIAGRAM
WDTE from Configuration Word register
SWDTEN from WDTCON
Conditions
16-bit WDT Prescaler
WDTPS<3:0>
From TMR0 Clock Source
Preliminary
A new prescaler has been added to the path between
the INTRC and the multiplexers used to select the path
for the WDT. This prescaler is 16 bits and can be
programmed to divide the INTRC by 128 to 65536, giv-
ing the time base used for the WDT a nominal range of
1 ms to 268s.
12.6.2
The WDTE bit is located in the Configuration Word
register. When set, the WDT runs continuously.
When the WDTE bit in the Configuration Word register
is set, the SWDTEN bit (WDTCON<0>) has no effect.
If WDTE is clear, then the SWDTEN bit can be used to
enable and disable the WDT. Setting the bit will enable
it and clearing the bit will disable it.
The PSA and PS<2:0> bits (OPTION_REG) have the
same function as in previous versions of the
PIC12F683 family of microcontrollers. See Section 5.0
“Timer0 Module” for more information.
0
1
WDT CONTROL
PSA
Cleared until the end of OST
WDT Time-out
0
PIC12F683
Prescaler
Cleared
WDT
1
8
(1)
DS41211B-page 89
PSA
PS<2:0>
To TMR0