PIC18F452-I/L Microchip Technology Inc., PIC18F452-I/L Datasheet - Page 120

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PIC18F452-I/L

Manufacturer Part Number
PIC18F452-I/L
Description
44 PIN, 32 KB FLASH, 1536 RAM, 34 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F452-I/L

A/d Inputs
8-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin PLCC
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC18FXX2
14.1
Capture/Compare/PWM Register 1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. All are readable and writable.
TABLE 14-1:
TABLE 14-2:
DS39564C-page 118
CCPx Mode CCPy Mode
Compare
Capture
Capture
PWM
PWM
PWM
CCP Mode
Compare
Capture
CCP1 Module
PWM
Compare
Compare
Compare
Capture
Capture
CCP MODE - TIMER
RESOURCE
INTERACTION OF TWO CCP MODULES
PWM
TMR1 or TMR3 time-base. Time-base can be different for each CCP.
The compare could be configured for the special event trigger,
which clears either TMR1 or TMR3 depending upon which time-base is used.
The compare(s) could be configured for the special event trigger,
which clears TMR1 or TMR3 depending upon which time-base is used.
The PWMs will have the same frequency and update rate
(TMR2 interrupt).
None
None
Timer Resource
Timer1 or Timer3
Timer1 or Timer3
Timer2
14.2
Capture/Compare/PWM Register2 (CCPR2) is com-
prised of two 8-bit registers: CCPR2L (low byte) and
CCPR2H (high byte). The CCP2CON register controls
the operation of CCP2. All are readable and writable.
Interaction
CCP2 Module
© 2006 Microchip Technology Inc.

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