AN82527F8 Intel, AN82527F8 Datasheet - Page 11

• Manufacturer Part Number: AN82527F8
• Description: IC CAN CONTRL 5V AUTOTEMP 44PLCC
• Manufacturer: Intel

Specifications of AN82527F8

• Rohs Status: RoHS non-compliant
• Controller Type: Serial Communications Controller (SCC)
• Interface: Serial
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 50mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 820732

A C Characteristics for 8-Bit Multiplexed Non-Intel Mode (Mode 2)
Conditions V
NOTES
1 Definition of ‘‘Read Cycle without a Previous Write’’ The time between the falling edge of E (for the previous write cycle)
and the rising edge of E (for the current read cycle) is greater than 2 t
2 Definition of ‘‘Write Cycle with a Previous Write’’ The time between the falling edge of E (for the previous write cycle) and
the falling edge of E (for the current write cycle) is less than 2 t
3 Definition of CD
1 t
1 t
1 t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
AVSL
SLAX
ELDZ
EHDV
QVEL
ELQX
ELDV
EHEL
ELEL
SHSL
RSEH
SLEH
CLSL
ELCH
COPD
CHCL
XTAL
SCLK
MCLK
Oscillator Frequency
System Clock Frequency
Memory Clock Frequency
Address Valid to AS Low
Address Hold after AS Low
Data Float after E Low
E High to Data Valid for Registers 02H
04H 05H
for Read Cycle without a Previous Write
for Read Cycle with a Previous Write
(for Registers except for 02H 04H 05H)
Data Setup to E Low
Input Data Hold after E Low
E Low to Output Data Valid on Port 1 2
E High Time
End of Previous Write (Last E Low) to E
Low for a Write Cycle
AS High Time
Setup Time of R W
AS Low to E High
CS
E Low to CS
CLKOUT Period
CLKOUT High Period
CC
V
Low to AS Low
e
is the value loaded in the CLKOUT register representing the CLKOUT divisor
5V
g
10% V
High
Parameter
to E High
SS
e
0V T
A
e b
(1)
40 C to
(CD
MCLK
V
a
a
MCLK
125 C C
1)
2 t
8 MHz
4 MHz
2 MHz
7 5 ns
t
10 ns
30 ns
20 ns
45 ns
30 ns
30 ns
20 ns
20 ns
MCLK
0 ns
0 ns
0 ns
Min
MCLK
t
OSC
(CD
L
e
V
b
100 pF
a
10 (CD
1) t
OSC (3)
1 5 t
3 5 t
V
2 t
a
MCLK
MCLK
MCLK
1)
16 MHz
10 MHz
8 MHz
45 ns
45 ns
Max
a
a
a
500 ns
t
OSC
100 ns
100 ns
82527
a
15
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