71M6521FE-IM Maxim Integrated Products, 71M6521FE-IM Datasheet - Page 32

• Manufacturer Part Number: 71M6521FE-IM
• Description: Current & Power Monitors & Regulators Residential Energy Meter IC
• Manufacturer: Maxim Integrated Products

Specifications of 71M6521FE-IM

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 783-71M6521FE-IM/F, 783-71M6521FE-IMR, 783-71M6521FE-IMR/F 783-71M6521FEIM-DB,

Interrupt Request register (IRCON)
External Interrupts
The 71M6521DE/FE MPU allows seven external interrupts. These are connected as shown in Table 46. The direction of
interrupts 2 and 3 is programmable in the MPU. Interrupts 2 and 3 should be programmed for falling sensitivity. The generic
8051 MPU literature states that interrupt 4 through 6 are defined as rising edge sensitive. Thus, the hardware signals attached
to interrupts 5 and 6 are inverted to achieve the edge polarity shown in Table 46.
FWCOLx interrupts occur when the CE collides with a flash write attempt. See the flash write description for more detail.
SFR (special function register) enable bits must be set to permit any of these interrupts to occur. Likewise, each interrupt has
its own flag bit, which is set by the interrupt hardware, and reset by the MPU interrupt handler. Note that XFER_BUSY,
RTC_1SEC, FWCOL0, FWCOL1, PLLRISE, PLLFALL, have their own enable and flag bits in addition to the interrupt 6, 4, and
2 enable and flag bits.
IE0 through IEX6 are cleared automatically when the hardware vectors to the interrupt handler. The other flags, IE_XFER
through IE_PB, are cleared by writing a zero to them. Since these bits are in a bit-addressable SFR byte, common practice
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IRCON.7
IRCON.6
IRCON.5
IRCON.4
IRCON.3
IRCON.2
IRCON.1
IRCON.0
Bit
MSB
Only TF0 and TF1 (timer 0 and timer 1 overflow flag) will be automatically cleared by hardware when the service
routine is called (Signals T0ACK and T1ACK – port ISR – active high when the service routine is called).
Symbol
IEX6
IEX5
IEX4
IEX3
IEX2
-
-
-
Interrupt
External
0
1
2
3
4
5
6
Function
External interrupt 6 edge flag
External interrupt 5 edge flag
External interrupt 4 edge flag
External interrupt 3 edge flag
External interrupt 2 edge flag
Connection
PLL_OK (rising), PLL_OK (falling)
XFER_BUSY OR RTC_1SEC
© 2005-2008 TERIDIAN Semiconductor Corporation
Digital I/O High Priority
Digital I/O Low Priority
FWCOL0, FWCOL1
EX6
Table 46: External MPU Interrupts
EEPROM busy
Table 44: The IRCON Register
CE_BUSY
Table 45: The IRCON Bit Functions
IEX5
IEX4
71M6521DE/71M6521FE
see DIO_Rx
see DIO_Rx
IEX3
Polarity
falling
falling
falling
falling
rising
Energy Meter IC
IEX2
Flag Reset
automatic
automatic
automatic
automatic
automatic
automatic
manual
LSB
DATASHEET
JANUARY 2008
v1.0