71M6521FE-IM Maxim Integrated Products, 71M6521FE-IM Datasheet - Page 12

• Manufacturer Part Number: 71M6521FE-IM
• Description: Current & Power Monitors & Regulators Residential Energy Meter IC
• Manufacturer: Maxim Integrated Products

Specifications of 71M6521FE-IM

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 783-71M6521FE-IM/F, 783-71M6521FE-IMR, 783-71M6521FE-IMR/F 783-71M6521FEIM-DB,

Battery Monitor
The battery voltage is measured by the ADC during alternative multiplexer frames if the BME (Battery Measure Enable) bit in
the I/O RAM is set. While BME is set, an on-chip 45kΩ load resistor is applied to the battery, and a scaled fraction of the
battery voltage is applied to the ADC input. After each alternative MUX frame, the result of the ADC conversion is available at
CE DRAM address 07. BME is ignored and assumed zero when system power is not available (V1 < VBIAS). See the Battery
Monitor section of the Electrical Specifications for details regarding the ADC LSB size and the conversion accuracy.
Functional Description
The AFE functions as a data acquisition system, controlled by the MPU. The main signals (IA, VA, IB, VB) are sampled and
the ADC counts obtained are stored in CE DRAM where they can be accessed by the CE and, if necessary, by the MPU.
Alternate multiplexer cycles are initiated less frequently by the MPU to gather access to the slow temperature and battery
signals.
The CE, a dedicated 32-bit signal processor, performs the precision computations necessary to accurately measure energy.
The CE calculations and processes include:
The CE program resides in flash memory. Common access to flash memory by CE and MPU is controlled by a memory share
circuit. Each CE instruction word is two bytes long. Allocated flash space for the CE program cannot exceed 1024 words
(2KB). The CE program counter begins a pass through the CE code each time multiplexer state 0 begins. The code pass ends
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Multiplication of each current sample with its associated voltage sample to obtain the energy per sample (when
multiplied with the constant sample time).
Frequency-insensitive delay cancellation on all six channels (to compensate for the delay between samples caused
by the multiplexing scheme).
90° phase shifter (for VAR calculations).
Pulse generation.
Monitoring of the input signal frequency (for frequency and phase information).
Monitoring of the input signal amplitude (for sag detection).
Scaling of the processed samples based on calibration coefficients.
V A
VB
IA
IB
TEMP
VBAT
MUX_ALT
EQU
CHOP_E
MUX_DIV
CTRL
MUX
MUX
© 2005-2008 TERIDIAN Semiconductor Corporation
Digital Computation Engine (CE)
MUX
CROSS
CK32
Figure 3: AFE Block Diagram
VREF_CAL
VREF_DIS
VBIAS
VREF
VREF
FIR_DONE
FIR_START
V3P3A
VBIAS
71M6521DE/71M6521FE
+
VREF
-
CONVERTER
ADC_E
ΔΣ ADC
4.9MHz
Energy Meter IC
FIR_LEN
FIR
DATASHEET
JANUARY 2008
v1.0