MPC8560PX833LC Freescale Semiconductor, MPC8560PX833LC Datasheet - Page 57

• Manufacturer Part Number: MPC8560PX833LC
• Description: IC MPU PWRQUICC III 783-FCPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8560PX833LC

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 833MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Family Name: MPC85XX
• Device Core: PowerQUICC III
• Device Core Size: 32b
• Frequency (max): 833MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2V
• Operating Supply Voltage (max): 1.26V
• Operating Supply Voltage (min): 1.14V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 783
• Package Type: FCBGA
• For Use With: MPC8560ADS-BGA - BOARD APPLICATION DEV 8560
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

13 RapidIO
This section describes the DC and AC electrical specifications for the RapidIO interface of the device.
13.1
RapidIO driver and receiver DC electrical characteristics are provided in
respectively.
Freescale Semiconductor
At recommended operating conditions with OV
Differential output high voltage
Differential output low voltage
Differential offset voltage
Output high common mode voltage
Output low common mode voltage
Common mode offset voltage
Differential termination
Short circuit current (either output)
HRESET to PCI-X initialization pattern hold time
Notes:
1. See the timing measurement conditions in the PCI-X 1.0a Specification.
2. Minimum times are measured at the package pin (not the test point). Maximum times are measured with the test
3. Setup time for point-to-point signals applies to REQ and GNT only. All other signals are bused.
4. For purposes of active/float timing measurements, the Hi-Z or off state is defined to be when the total current
5. Setup time applies only when the device is not driving the pin. Devices cannot drive and receive signals at the same
6. Maximum value is also limited by delay to the first transaction (time for HRESET high to first configuration access,
7. A PCI-X device is permitted to have the minimum values shown for t
8. Device must meet this specification independent of how many outputs switch simultaneously.
9. The timing parameter t
10.The timing parameter t
11.Guaranteed by characterization.
12.Guaranteed by design.
point and load circuit.
delivered through the component pin is less than or equal to the leakage current specification.
time.
t
than two clocks before the first FRAME and must be floated no later than one clock before FRAME is asserted.
conventional mode, the device must meet the requirements specified in PCI 2.2 for the appropriate clock frequency.
Specification.
Specification.
PCRHFV
RapidIO DC Electrical Characteristics
). The PCI-X initialization pattern control signals after the rising edge of HRESET must be negated no later
Table 46. RapidIO 8/16 LP-LVDS Driver DC Electrical Characteristics
Characteristic
Table 45. PCI-X AC Timing Specifications at 133 MHz (continued)
Parameter
MPC8560 Integrated Processor Hardware Specifications, Rev. 5
PCIVKH
PCRHFV
is a minimum of 1.4 ns rather than the minimum of 1.2 ns in the PCI-X 1.0a
is a minimum of 10 clocks rather than the minimum of 5 clocks in the PCI-X 1.0a
DD
of 3.3 V ± 5%.
Symbol
ΔV
V
ΔV
V
R
V
V
OHCM
|I
OLCM
TERM
Symbol
OHD
OSCM
OLD
t
SS
OSD
PCRHIX
|
PCKHOV
1.125
1.125
–454
Min
247
—
—
90
—
Min
0
and t
Table 46
CYC
1.375
1.375
–247
Max
Max
454
220
50
50
50
24
only in PCI-X mode. In
and
Unit
ns
Table
Unit
mV
mV
mV
mV
mA
W
V
V
47,
Notes
6, 12
Notes
1, 2
1, 2
1, 4
1, 5
1, 6
1,3
—
7
RapidIO
57