MPC8560PX833LC Freescale Semiconductor, MPC8560PX833LC Datasheet - Page 25

• Manufacturer Part Number: MPC8560PX833LC
• Description: IC MPU PWRQUICC III 783-FCPBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8560PX833LC

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 833MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Family Name: MPC85XX
• Device Core: PowerQUICC III
• Device Core Size: 32b
• Frequency (max): 833MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2V
• Operating Supply Voltage (max): 1.26V
• Operating Supply Voltage (min): 1.14V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 783
• Package Type: FCBGA
• For Use With: MPC8560ADS-BGA - BOARD APPLICATION DEV 8560
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

At recommended operating conditions with LV
Figure 8
Figure 9
Freescale Semiconductor
RX_CLK clock rise and fall time
Note:
1. The symbols used for timing specifications herein follow the pattern of t
2. Signal timings are measured at 0.7 V and 1.9 V voltage levels.
3. Guaranteed by design.
for inputs and t
receive timing (GR) with respect to the time data input signals (D) reaching the valid state (V) relative to the t
(K) going to the high state (H) or setup time. Also, t
input signals (D) went invalid (X) relative to the t
general, the clock reference symbol representation is based on three letters representing the clock of a particular functional.
For example, the subscript of t
used with the appropriate letter: R (rise) or F (fall).
provides the AC test load for TSEC.
shows the GMII receive AC timing diagram.
(first two letters of functional block)(reference)(state)(signal)(state)
Parameter/Condition
RXD[7:0]
RX_CLK
RX_DV
RX_ER
Table 22. GMII Receive AC Timing Specifications (continued)
Output
MPC8560 Integrated Processor Hardware Specifications, Rev. 5
GRX
represents the GMII (G) receive (RX) clock. For rise and fall times, the latter convention is
Figure 9. GMII Receive AC Timing Diagram
t
t
GRXH
GRDVKH
DD
of 3.3 V ± 5%, or LV
Figure 8. TSEC AC Test Load
t
GRX
Z
0
GRX
= 50 Ω
GRDXKL
clock reference (K) going to the low (L) state or hold time. Note that, in
symbolizes GMII receive timing (GR) with respect to the time data
t
DD
GRXR
=2.5V ± 5%.
Symbol
t
GRXF
, t
GRXF
t
GRDXKH
for outputs. For example, t
(first two letters of functional block)(signal)(state) (reference)(state)
1
2,3
R
L
t
GRXR
= 50 Ω
Min
—
Ethernet: Three-Speed, MII Management
LV
DD
Typ
—
/2
GRDVKH
symbolizes GMII
Max
RX
1.0
clock reference
Unit
ns
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