MPC8347EVVALFB Freescale Semiconductor, MPC8347EVVALFB Datasheet - Page 3

IC MPU POWERQUICC II 672-TBGA

MPC8347EVVALFB

Manufacturer Part Number
MPC8347EVVALFB
Description
IC MPU POWERQUICC II 672-TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II PROr
Datasheets

Specifications of MPC8347EVVALFB

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
667MHz
Voltage
1.3V
Mounting Type
Surface Mount
Package / Case
672-TBGA
Processor Series
MPC8xxx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
MPC8349E-MITXE
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
I/o Voltage
1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
0 C
Core Size
32 Bit
Program Memory Size
64KB
Cpu Speed
667MHz
Embedded Interface Type
I2C, SPI, USB, UART
Digital Ic Case Style
TBGA
No. Of Pins
672
Rohs Compliant
Yes
Family Name
MPC83xx
Device Core
PowerQUICC II Pro
Device Core Size
32b
Frequency (max)
667MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.3V
Operating Supply Voltage (max)
1.36V
Operating Supply Voltage (min)
1.24V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
672
Package Type
TBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Freescale Semiconductor
— On-the-fly power management using CKE
— Registered DIMM support
— 2.5-V SSTL2 compatible I/O
Dual three-speed (10/100/1000) Ethernet controllers (TSECs)
— Dual controllers designed to comply with IEEE 802.3®, 802.3u®, 820.3x®, 802.3z®,
— Ethernet physical interfaces:
— Buffer descriptors are backward-compatible with MPC8260 and MPC860T 10/100
— 9.6-Kbyte jumbo frame support
— RMON statistics support
— Internal 2-Kbyte transmit and 2-Kbyte receive FIFOs per TSEC module
— MII management interface for control and status
— Programmable CRC generation and checking
— Designed to comply with PCI Specification Revision 2.2
— Data bus width:
— PCI 3.3-V compatible
— PCI host bridge capabilities
— PCI agent mode on PCI interface
— PCI-to-memory and memory-to-PCI streaming
— Memory prefetching of PCI read accesses and support for delayed read transactions
— Posting of processor-to-PCI and PCI-to-memory writes
— On-chip arbitration supporting five masters on PCI
— Accesses to all PCI address spaces
— Parity supported
— Selectable hardware-enforced coherency
— Address translation units for address mapping between host and peripheral
— Dual address cycle for target
— Internal configuration registers accessible from PCI
Security engine is optimized to handle all the algorithms associated with IPSec, SSL/TLS, SRTP,
IEEE Std. 802.11i®, iSCSI, and IKE processing. The security engine contains four
crypto-channels, a controller, and a set of crypto execution units (EUs):
— Public key execution unit (PKEU) :
PCI interface
MPC8347E PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications, Rev. 11
802.3ac® standards
– 1000 Mbps IEEE Std. 802.3 GMII/RGMII, IEEE Std. 802.3z TBI/RTBI, full-duplex
– 10/100 Mbps IEEE Std. 802.3 MII full- and half-duplex
programming models
– 32-bit data PCI interface operating at up to 66 MHz
– RSA and Diffie-Hellman algorithms
Overview
3

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