MPC5200CVR400B Freescale Semiconductor, MPC5200CVR400B Datasheet - Page 10

IC MPU 32BIT 400MHZ 272-PBGA

MPC5200CVR400B

Manufacturer Part Number
MPC5200CVR400B
Description
IC MPU 32BIT 400MHZ 272-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC5200CVR400B

Processor Type
MPC52xx PowerPC 32-Bit
Speed
400MHz
Voltage
1.5V
Mounting Type
Surface Mount
Package / Case
272-PBGA
Processor Series
MPC52xx
Core
e300
Development Tools By Supplier
MEDIA5200KIT1E
Maximum Clock Frequency
400 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
I/o Voltage
2.5 V, 3.3 V
Minimum Operating Temperature
- 40 C
Core Size
32 Bit
No. Of I/o's
56
Ram Memory Size
16KB
Cpu Speed
400MHz
No. Of Timers
8
Embedded Interface Type
CAN, I2C, SCI, SPI
No. Of Pwm Channels
8
Digital Ic Case Style
TEPBGA
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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where:
R
ambient thermal resistance, R
mounting arrangement on printed circuit board, or change the thermal dissipation on the printed circuit board surrounding the
device. This description is most useful for ceramic packages with heat sinks where some 90% of the heat flow is through the
case to the heat sink to ambient. For most packages, a better model is required.
A more accurate thermal model can be constructed from the junction to board thermal resistance and the junction to case thermal
resistance. The junction to case covers the situation where a heat sink is used or a substantial amount of heat is dissipated from
the top of the package. The junction to board thermal resistance describes the thermal performance when most of the heat is
conducted to the printed circuit board. This model can be used for hand estimations or for a computational fluid dynamics (CFD)
thermal model.
To determine the junction temperature of the device in the application after prototypes are available, the Thermal
Characterization Parameter (Ψ
the top center of the package case using the following equation:
where:
The thermal characterization parameter is measured per JESD51-2 specification using a 40-gauge type T thermocouple epoxied
to the top center of the package case. The thermocouple should be positioned, so that the thermocouple junction rests on the
package. A small amount of epoxy is placed over the thermocouple junction and over approximately one mm of wire extending
from the junction. The thermocouple wire is placed flat against the package case to avoid measurement errors caused by cooling
effects of the thermocouple wire.
1.2
The MPC5200B System requires a system-level clock input SYS_XTAL. This clock input may be driven directly from an
external oscillator or with a crystal using the internal oscillator.
There is a separate oscillator for the independent Real-Time Clock (RTC) system.
The MPC5200B clock generation uses two phase locked loop (PLL) blocks.
10
θJC
is device related and cannot be influenced by the user. The user controls the thermal environment to change the case to
R
R
R
T
Ψ
P
The system PLL (SYS_PLL) takes an external reference frequency and generates the internal system clock. The
system clock frequency is determined by the external reference frequency and the settings of the SYS_PLL
configuration.
The e300 core PLL (CORE_PLL) generates a master clock for all of the CPU circuitry. The e300 core clock frequency
is determined by the system clock frequency and the settings of the CORE_PLL configuration.
D
T
θJA
θJC
θCA
JT
Oscillator and PLL Electrical Characteristics
= thermocouple temperature on top of package (ºC)
= power dissipation in package (W)
= thermal characterization parameter (ºC/W)
= junction to case thermal resistance (ºC/W)
= junction to ambient thermal resistance (ºC/W)
= case to ambient thermal resistance (ºC/W)
θCA
JT
) can be used to determine the junction temperature with a measurement of the temperature at
. For instance, the user can change the air flow around the device, add a heat sink, change the
MPC5200B Data Sheet, Rev. 4
T
R
J
θ
JA
= T
= R
T
+(
θ
Ψ
JC
JT
+R
×
θ
P
CA
D
)
Freescale Semiconductor
Eqn. 4
Eqn. 5

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