EP3C55F484C7N Altera, EP3C55F484C7N Datasheet - Page 248

• Manufacturer Part Number: EP3C55F484C7N
• Description: IC CYCLONE III FPGA 55K 484FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C55F484C7N

• Number Of Logic Elements/cells: 55856
• Number Of Labs/clbs: 3491
• Total Ram Bits: 2396160
• Number Of I /o: 327
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Cyclone III
• Number Of Logic Blocks/elements: 55856
• # I/os (max): 327
• Frequency (max): 437.5MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 55856
• Ram Bits: 2396160
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FBGA
• No. Of Logic Blocks: 3491
• Family Type: Cyclone III
• No. Of I/o's: 327
• I/o Supply Voltage: 3.3V
• Operating Frequency Max: 437.5MHz
• Operating Temperature Range: 0°C To +85°C
• Rohs Compliant: Yes
• For Use With: 544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2509

9–88
Quartus II Software Support
Chapter Revision History
Table 9–32. Chapter Revision History
Cyclone III Device Handbook, Volume 1
December 2009
July 2009
June 2009
Date
f
1
The user watchdog timer is not enabled during the configuration cycle of the device.
Errors during configuration are detected by the CRC engine. Also, the timer is
disabled for factory configuration. Functional errors must not exist in the factory
configuration because it is stored and validated during production and is never
updated remotely.
The user watchdog timer is disabled in factory configurations and during the
configuration cycle of the application configuration. It is enabled after the application
configuration enters user mode.
Implementation in your design requires a remote system upgrade interface between
the Cyclone III device family logic array and the remote system upgrade circuitry. You
must also generate configuration files for production and remote programming of the
system configuration memory. The Quartus II software provides these features.
The two implementation options, the ALTREMOTE_UPDATE megafunction and the
remote system upgrade atom, are for the interface between the remote system
upgrade circuitry and the device logic array interface. Using the megafunction block
instead of creating your own logic saves design time and offers more efficient logic
synthesis and device implementation.
For more information about the ALTREMOTE_UPDATE megafunction, refer to the
Remote Update Circuitry (ALTREMOTE_UPDATE) Megafunction User
Table 9–32
Version
1.2
1.1
1.0
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
lists the revision history for this chapter.
■
■
■
■
Made a minor correction to the part number.
Initial release.
Updated
Updated
Updated the
Against Tampering”
Minor changes to the text.
Table
Figure 9–23
“Programming Serial Configuration Devices”
9–7,
Table
sections.
and
9–10,
Figure
Changes Made
Table
9–30.
9–22, and
© December 2009 Altera Corporation
Table
9–28.
Chapter Revision History
Guide.
and
“Security