EP2SGX60EF1152C3N Altera, EP2SGX60EF1152C3N Datasheet - Page 78

IC STRATIX II GX 60K 1152-FBGA

EP2SGX60EF1152C3N

Manufacturer Part Number
EP2SGX60EF1152C3N
Description
IC STRATIX II GX 60K 1152-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet

Specifications of EP2SGX60EF1152C3N

Number Of Logic Elements/cells
60440
Number Of Labs/clbs
3022
Total Ram Bits
2544192
Number Of I /o
534
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2181

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TriMatrix Memory
2–70
Stratix II GX Device Handbook, Volume 1
Note to
(1)
Simple dual-port memory
mixed width support
True dual-port memory
mixed width support
Power-up conditions
Register clears
Mixed-port read-during-write Unknown output/old data Unknown output/old data
Configurations
Table 2–19. TriMatrix Memory Features (Part 2 of 2)
Violating the setup or hold time on the memory block address registers could corrupt memory contents. This
applies to both read and write operations.
Memory Feature
Table
2–19:
TriMatrix memory provides three different memory sizes for efficient
application support. The Quartus II software automatically partitions the
user-defined memory into the embedded memory blocks using the most
efficient size combinations. You can also manually assign the memory to
a specific block size or a mixture of block sizes.
M512 RAM Block
The M512 RAM block is a simple dual-port memory block and is useful
for implementing small FIFO buffers, DSP, and clock domain transfer
applications. Each block contains 576 RAM bits (including parity bits).
M512 RAM blocks can be configured in the following modes:
When configured as RAM or ROM, you can use an initialization file to
pre-load the memory contents.
M512 RAM Block
Simple dual-port RAM
Single-port RAM
FIFO
ROM
Shift register
Output registers
Outputs cleared
(32 × 18 Bits)
512 × 1
256 × 2
128 × 4
32 × 16
32 × 18
64 × 8
64 × 9
v
M4K RAM Block
Output registers
Outputs cleared
(128 × 36 Bits)
256 × 16
256 × 18
128 × 32
128 × 36
512 × 8
512 × 9
4K × 1
2K × 2
1K × 4
v
v
Outputs unknown
Unknown output
Output registers
(4K × 144 Bits)
M-RAM Block
Altera Corporation
32K × 16
32K × 18
16K × 32
16K × 36
4K × 128
4K × 144
64K × 8
64K × 9
8K × 64
8K × 72
v
v
October 2007

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