EP2S15F672C3N Altera, EP2S15F672C3N Datasheet - Page 179

• Manufacturer Part Number: EP2S15F672C3N
• Description: IC STRATIX II FPGA 15K 672-FBGA
• Manufacturer: Altera
• Series: Stratix® IIr

Specifications of EP2S15F672C3N

• Number Of Logic Elements/cells: 15600
• Number Of Labs/clbs: 780
• Total Ram Bits: 419328
• Number Of I /o: 366
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-FBGA
• No. Of Macrocells: 15600
• Family Type: Stratix II
• No. Of I/o's: 366
• Clock Management: DLL, PLL
• I/o Supply Voltage: 3.6V
• Operating Frequency Max: 550MHz
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-1880; EP2S15F672C3N

Altera Corporation
April 2011
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C I N
C O U T
P L L C I N
P L L C O U T
C I N
C O U T
P L L C I N
P L L C O U T
C I N
C O U T
P L L C I N
P L L C O U T
Table 5–47. EP2S15 Row Pins Global Clock Timing Parameters
Table 5–48. EP2S30 Column Pins Regional Clock Timing Parameters
Table 5–49. EP2S30 Column Pins Global Clock Timing Parameters
Parameter
Parameter
Parameter
Industrial
Industrial
Industrial
-0.125
-0.043
-0.056
1.206
1.211
1.553
1.396
0.114
1.539
1.382
0.101
-0.12
Minimum Timing
Minimum Timing
Minimum Timing
EP2S30 Clock Timing Parameters
Tables 5–48
for EP2S30 devices.
Commercial
Commercial
Commercial
-0.138
-0.133
-0.052
-0.067
1.262
1.267
1.627
1.462
0.113
1.613
1.448
0.098
through
5–51
-3 Speed
-3 Speed
-3 Speed
Grade
-0.023
-0.027
Grade
-0.017
Grade
-0.033
2.113
2.109
show the maximum clock timing parameters
2.639
2.397
0.225
2.622
2.380
0.209
Stratix II Device Handbook, Volume 1
-4 Speed
-4 Speed
-4 Speed
Grade
-0.038
-0.042
Grade
Grade
-0.049
2.422
2.418
3.025
2.747
0.248
3.008
2.730
0.229
-0.03
DC & Switching Characteristics
-5 Speed
-5 Speed
-5 Speed
Grade
-0.056
-0.061
Grade
-0.044
Grade
-0.057
2.815
2.810
3.509
3.185
3.501
3.177
0.267
0.28
Unit
Unit
Unit
5–43
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns