SI5338M-A-GMR Silicon Laboratories Inc, SI5338M-A-GMR Datasheet - Page 56

• Manufacturer Part Number: SI5338M-A-GMR
• Manufacturer: Silicon Laboratories Inc

Si5338
Reset value = xxxx xxxx
56
Register 28.
Name
Type
Bit
Bit
7:6
4:2
1:0
5
XTAL_FREQ[1:0]
P1DIV_IN[2:0]
P2DIV_IN[0]
R/W
Reserved
D7
Name
D6
Reserved. Must only write a 00 to these bits.
This bit and Register 30[4:3] create a 3-bit field that selects the input to the P2
divider [reg30[4:3] reg28[5]] = P2DIV_IN[2:0].
000b: Clock from IN5,IN6 is input to P2 divider
011b: Clock from IN4 is input to P2
100b: No clock is input to P2
All other bit values are reserved.
These three bits are combined with Register 29[4:3] and create a 5-bit field that
selects the input to the P1 divider [reg29[4:3] reg28[4:2]] = P1DIV_IN[4:0].
00000b: Clock from IN1,IN2 selected
01010b: Clock from IN3 selected
10101b: Crystal oscillator selected
All other bit values are reserved and should not be written.
Crystal Frequency Range.
Select Xtal Frequency that you are using. For more information on using crystals,
see “AN360: Crystal Selection Guide for Si533x/5x Devices”.
0: 8–11 MHz
1: 11–19 MHz
2: 19–26 MHz
3: 26–30 MHz
P2DIV_IN[0]
R/W
D5
Rev. 0.6
D4
P1DIV_IN[2:0]
Function
R/W
D3
D2
XTAL_FREQ[1:0]
D1
R/W
D0