SI5338M-A-GMR Silicon Laboratories Inc, SI5338M-A-GMR Datasheet - Page 105

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SI5338M-A-GMR

Manufacturer Part Number
SI5338M-A-GMR
Description
Manufacturer
Silicon Laboratories Inc
Datasheets
Reset value = xxxx xxxx
Reset value = xxxx xxxx
Register 118.
Register 119.
Name
Name
Type
Type
Bit
Bit
7:6
5:0
7:0
Bit
Bit
CLK2_DISST[1:0]
D7
D7
MS3_PHOFF[7:0]
MS2_PHSTEP[13:8]
CLK2_DISST[1:0]
R/W
Name
Name
D6
D6
D5
D5
MultiSynth3 Initial Phase Offset.
MultiSynth3_PHOFF[14:0] is a 2s complement number. The initial phase
offset is MultiSynth3_PHOFF[14:0] x Tvco/128 where Tvco is the period
of the VCO.
MultiSynth2 Output Driver State When Disabled.
00: High impedance
01: Logic low
10: Logic high
11: Always on even if disabled
MultiSynth2 Phase Step Size.
The phase step size is MS2_PHSTEP[13:0]*Tvco/128 where Tvco is
the period of the VCO. Either the phase inc/dec pins (if available) or
register 74[1:0] will control the stepping of phase. A phase increment
will delay the clock edge.
MS3_PHOFF[7:0]
D4
D4
Rev. 0.6
R/W
MS2_PHSTEP[13:8]
D3
D3
R/W
Function
Function
D2
D2
D1
D1
Si5338
D0
D0
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