N25Q128A11B1240E NUMONYX, N25Q128A11B1240E Datasheet - Page 117

• Manufacturer Part Number: N25Q128A11B1240E
• Manufacturer: NUMONYX

Specifications of N25Q128A11B1240E

• Cell Type: NOR
• Density: 128Mb
• Access Time (max): 7ns
• Interface Type: Serial (SPI)
• Boot Type: Bottom
• Address Bus: 1b
• Operating Supply Voltage (typ): 1.8V
• Operating Temp Range: -40C to 85C
• Package Type: TBGA
• Program/erase Volt (typ): 1.7 to 2/8.5 to 9.5V
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 1.7V
• Operating Supply Voltage (max): 2V
• Word Size: 8b
• Number Of Words: 16M
• Supply Current: 20mA
• Mounting: Surface Mount
• Pin Count: 24
• Lead Free Status / Rohs Status: Supplier Unconfirmed

9.2.4
9.2.5
DQ0
DQ1
C
S
0
Instruction
1
2
Figure 46. Read OTP instruction and data-out sequence DIO-SPI
Write Enable (WREN)
The Write Enable (WREN) instruction sets the Write Enable Latch (WEL) bit.
Apart form the parallelizing of the instruction code on the two pins DQ0 and DQ1, the
instruction functionality is exactly the same as the Write Enable (WREN) instruction of the
Extended SPI protocol.
Figure 47. Write Enable instruction sequence DIO-SPI
Write Disable (WRDI)
The Write Disable (WRDI) instruction resets the Write Enable Latch (WEL) bit.
Apart form the parallelizing of the instruction code on the two pins DQ0 and DQ1, the
instruction functionality is exactly the same as the Write Disable (WRDI) instruction of the
Extended SPI protocol, please refer to
details.
3
S
C
DQ0
DQ1
23 21 19 17
22 20 18 16
4
5
6
7
24-Bit Address
15 13 11 9
14 12 10 8
8
9 10 11
0
Instruction
12 13 14 15
7
6
5
4
1
3
2
2
1
0
3
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
Section 9.1.10: Write Disable (WRDI)
Dual_Write_Enable
4
Dummy cycles
MSB
7
6
Data Out 1
5
4
3
2
1
0
Dual_Read_OTP
MSB
for further
6
7
Data Out n
4
5
2
3
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0
1