KU82596CA33 S N222 Intel, KU82596CA33 S N222 Datasheet - Page 34

• Manufacturer Part Number: KU82596CA33 S N222
• Manufacturer: Intel

Specifications of KU82596CA33 S N222

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

NOP
This command results in no action by the 82596 except for those performed in the normal command process-
ing It is used to manipulate the CBL manipulation The format of the NOP command is shown in Figure 21
where
LINK POINTER
EL
S
I
CMD (bits 16– 18)
Bits 19–28
C
B
The C and B bits are modified in one operation
OK
Individual Address Setup
This command is used to load the 82596 with the Individual Address This address is used by the 82596 for
inserting the Source Address during transmission and recognizing the Destination Address during reception
After RESET and prior to Individual Address Setup Command execution the 82596 assumes the Broadcast
Address is the Individual Address in all aspects i e
31
EL S
31
EL S
A31
X X X X X X X X X X X X X X X X A15
This will be the Individual Address Match reference
This will be the Source Address of a transmitted frame (for AL-LOC
I
I
X X X X X X X X X X
0
0
0
In the 82586 or 32-bit Segmented modes this is a 16-bit offset to the next Command
Block In the Linear mode this is the 32-bit address of the next Command Block
If set this bit indicates that this command block is the last on the CBL
If set to one suspend the CU upon completion of this CB
If set to one the 82596 will generate an interrupt after execution of the command is
complete If I is not set to one the CX bit will not be set
The NOP command Value 0h
Reserved (zero in the 32-bit Segmented and Linear modes)
This bit indicates the execution status of the command The CPU initially resets it to zero
when the Command Block is placed on the CBL Following a command Completion the
82596 will set it to one
This bit indicates that the 82596 is currently executing the NOP command It is initially
reset to zero by the CPU The 82596 sets it to one when execution begins and to zero
when execution is completed This bit is also set when the 82596 prefetches the com-
mand
Indicates that the command was executed without error If set to one no error occurred
(command executed OK) If zero an error occured
ODD WORD
ODD WORD
0
0
0
0
NOP 82586 and 32-Bit Segmented Modes
0
0
0
NOP Linear Mode
0
0
LINK ADDRESS
0
0
Figure 21
16
16
NOTE
0 C B OK 0
0 C B OK 0
15
15
0
0
0
0
e
LINK OFFSET
0 mode only)
EVEN WORD
EVEN WORD
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
82596CA
0
0
A0
A0
0 0
0 0
0
0
4
4
33