AD5420AREZ Analog Devices Inc, AD5420AREZ Datasheet - Page 18

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AD5420AREZ

Manufacturer Part Number
AD5420AREZ
Description
IC DAC 16BIT 1CH SER 24TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5420AREZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Design Resources
Simplified 16-Bit, 4 mA-to-20 mA Output Solution Using AD5420 (CN0098)
Settling Time
10µs
Number Of Bits
16
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
950mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP Exposed Pad, 24-eTSSOP, 24-HTSSOP
Resolution (bits)
16bit
Input Channel Type
Serial
Supply Voltage Range - Digital
2.7V To 5.5V
Supply Current
4mA
Digital Ic Case Style
TSSOP
No. Of Pins
24
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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AD5410/AD5420
POWER-ON STATE
Upon power-on of the AD5410/AD5420, the power-on reset
circuit ensures that all registers are loaded with zero code. As
such, the output is disabled (tristate). Also upon power-on,
internal calibration registers are read, and the data is applied to
internal calibration circuitry. For a reliable read operation, there
must be sufficient voltage on the AV
is triggered by the DV
up the DV
and AV
is enabled, the supplies should be powered up at a rate greater
than, typically, 500 V/sec or 24 V per 50 ms. If this cannot be
achieved, simply issue a reset command to the AD5410/AD5420
after power-on. This performs a power-on reset event, reading
the calibration registers and ensuring specified operation of the
AD5410/AD5420.
TRANSFER FUNCTION
For the 0 mA to 20 mA, 0 mA to 24 mA, and 4 mA to 20 mA
current output ranges, the output current is respectively
expressed as
where:
D is the decimal equivalent of the code loaded to the DAC.
N is the bit resolution of the DAC.
Table 12. Programming the AD5410 Data Register
MSB
DB15
1
Table 13. Programming the AD5420 Data Register
MSB
DB15
Table 14. Programming the Control Register
MSB
DB15
0
X = don’t care.
I
I
I
OUT
OUT
OUT
DD
are powered up simultaneously or if the internal DV
CC
=
=
=
DB14
DB14
DB14
0
supply after the AV
16
20
24
2
2
2
mA
mA
mA
N
N
N
DB13
DB13
×
CC
×
×
D
D
D
power supply powering up. Powering
DB13
REXT
+
4
mA
DB12
DB12
DD
DB12
OUTEN
DD
supply ensures this. If DV
supply when the read event
DB11
DB11
12-bit data-word
DB11
DB10
DB10
DB10
SR clock
CC
DB9
DB9
Rev. B | Page 18 of 28
16-bit data-word
CC
DB9
DB8
DB8
DB8
DATA REGISTER
The data register is addressed by setting the address byte of the
input shift register to 0x01. The data to be written to the data
register is entered in Position DB15 to Position DB4 for the
AD5410 and in Position DB15 to Position DB0 for the AD5420,
as shown in Table 12 and Table 13, respectively
CONTROL REGISTER
The control register is addressed by setting the address byte of
the input shift register to 0x55. The data to be written to the
control register is entered in Position DB15 to Position DB0,
as shown in Table 14. The control register bit functions are
described in Table 10.
Table 10. Control Register Bit Functions
Bit
REXT
OUTEN
SR Clock
SR Step
SREN
DCEN
R2, R1, R0
Table 11. Output Range Options
R2
1
1
1
DB7
DB7
DB7
R1
0
1
1
DB6
DB6
SR step
DB6
Description
Setting this bit selects the external current setting
resistor. See the AD5410/AD5420 Features section
for further details.
Output enable. This bit must be set to enable the
output.
Digital slew rate control. See the AD5410/AD5420
Features section.
Digital slew rate control. See the AD5410/AD5420
Features section.
Digital slew rate control enable.
Daisy-chain enable.
Output range select. See Table 11.
R0
1
0
1
DB5
DB5
DB5
Output Range Selected
4 mA to 20 mA current range
0 mA to 20 mA current range
0 mA to 24 mA current range
DB4
DB4
DB4
SREN
DB3
DB3
X
1
DB3
DCEN
DB2
DB2
X
1
DB2
R2
DB1
DB1
X
1
DB1
R1
DB0
DB0
X
1
DB0
R0
LSB
LSB
LSB

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