PIC18F86K90-I/PT Microchip Technology, PIC18F86K90-I/PT Datasheet - Page 383

• Manufacturer Part Number: PIC18F86K90-I/PT
• Description: 64kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm TRA
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F86K90-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

23.7
Figure 23-6 shows the operation of the A/D Converter
after the GO/DONE bit has been set and the
ACQT<2:0> bits are cleared. A conversion is started
after the following instruction to allow entry into Sleep
mode before the conversion begins.
Figure 23-7 shows the operation of the A/D Converter
after the GO/DONE bit has been set, the ACQT<2:0>
bits set to ‘ 010 ’ and a 4 T
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The A/D Result register
pair will NOT be updated with the partially completed
A/D
FIGURE 23-6:
FIGURE 23-7:
 2010 Microchip Technology Inc.
Set GO/DONE bit
(Holding capacitor continues
acquiring input)
1
T
Set GO/DONE bit
conversion
CY
Holding capacitor is disconnected from analog input (typically 100 ns)
A/D Conversions
T
- T
ACQT
Automatic
Acquisition
Time
2
AD
Conversion starts
Cycles
T
AD
3
1
sample.
A/D CONVERSION T
A/D CONVERSION T
T
b11
AD
AD
4
2
acquisition time selected.
Conversion starts
(Holding capacitor is disconnected)
T
AD
b10
1
3
This
T
b11
AD
b9
2
Next Q4: ADRESH:ADRESL is loaded, GO/DONE bit is cleared,
4
Next Q4: ADRESH:ADRESL is loaded, GO/DONE bit is cleared,
means
T
b10
AD
3
b8
AD
5
AD
ADIF bit is set, holding capacitor is connected to analog input.
ADIF bit is set, holding capacitor is reconnected to analog input.
T
CYCLES (ACQT<2:0> = 000, T
CYCLES (ACQT<2:0> = 010, T
Preliminary
AD
the
b7
b9
4
6
T
AD
b6
5
b8
7
PIC18F87K90 FAMILY
T
ADRESH:ADRESL registers will continue to contain
the value of the last completed conversion (or the last
value written to the ADRESH:ADRESL registers).
After the A/D conversion is completed or aborted, a
2 T
started. After this wait, acquisition on the selected
channel is automatically started.
T
AD
b7
AD
b5
6
Note:
AD
8
Cycles
wait is required before the next acquisition can be
T
b6
AD
7
b4
9 T
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
b5
AD
8
b3
10
T
b4
AD
9
b2
ACQ
ACQ
11
T
10
b3
= 0)
AD
= 4 T
b1
12
b2
T
AD
11
AD
b0
DS39957B-page 383
)
13
12
b1
13
b0