MAX5393NAUD+ Maxim Integrated Products, MAX5393NAUD+ Datasheet - Page 3

• Manufacturer Part Number: MAX5393NAUD+
• Description: IC POT DGTL DUAL 256TAP 14TSSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX5393NAUD+

• Taps: 256
• Resistance (ohms): 100K
• Number Of Circuits: 2
• Temperature Coefficient: 35 ppm/°C Typical
• Memory Type: Volatile
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 1.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Resistance In Ohms: 100K
• Number Of Pots: Dual
• Taps Per Pot: 256
• Resistance: 200 Ohms
• Wiper Memory: Volatile
• Digital Interface: Serial (3-Wire, SPI)
• Operating Supply Voltage: 1.7 V to 5.5 V
• Supply Current: 27 uA
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Description/function: Dual Volatile Low Voltage Linear Taper Digital Potentiometer
• Mounting Style: SMD/SMT
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.7 V
• Tolerance: 25 %
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ELECTRICAL CHARACTERISTICS (continued)
(V
T
Note 1: All devices are 100% production tested at T
Note 2: DNL and INL are measured with the potentiometer configured as a voltage-divider (Figure 1) with H_ = V
Note 3: R-DNL and R-INL are measured with the potentiometer configured as a variable resistor (Figure 1). DNL and INL are
Note 4: The wiper resistance is the value measured by injecting the currents given in Note 3 into W_ with L_ = GND.
Note 5: Drive HA with a 1kHz GND to V
Note 6: The wiper-settling time is the worst-case 0 to 50% rise time, measured between tap 0 and tap 127. H_ = V
Note 7: Digital timing is guaranteed by design and characterization, not production tested.
Wiper Settling Time (Note 6)
Charge-Pump Feedthrough at W_
POWER SUPPLIES
Supply Voltage Range
Standby Current
DIGITAL INPUTS
Minimum Input High Voltage
Maximum Input Low Voltage
Input Leakage Current
Input Capacitance
TIMING CHARACTERISTICS—SPI (Note 7)
SCLK Frequency
SCLK Clock Period
SCLK Pulse-Width High
SCLK Pulse-Width Low
CS Fall to SCK Rise Setup Time
SCLK Rise to CS Rise Hold Time
DIN Setup Time
DIN Hold Time
SCLK Rise to CS Fall Delay
SCLK Rise to SCLK Rise Hold Time
CS Pulse-Width High
A
DD
= +25NC.) (Note 1)
= +1.7V to +5.5V, V
and characterization.
GND. The wiper terminal is unloaded and measured with a high-input-impedance voltmeter.
measured with the potentiometer configured as a variable resistor. H_ is unconnected and L_ = GND. For V
wiper terminal is driven with a source current of 400FA for the 10kI configuration, 80FA for the 50kI configuration, and
40FA for the 100kI configuration. For V
10kI configuration, 30FA for the 50kI configuration, and 15FA for the 100kI configuration.
R
Measure WB.
and the wiper terminal is loaded with 10pF capacitance to ground.
W_
PARAMETER
= (V
W_
_______________________________________________________________________________________
- V
H_
)/I
H_
W_
= V
.
Linear Taper Digital Potentiometers
Dual 256-Tap, Volatile, Low-Voltage
DD
, V
SYMBOL
L_
f
t
t
t
t
t
DD
V
V
MAX
CSW
t
t
CSS
CSH
t
t
V
t
CS0
CS1
V
CP
CH
DS
DH
CL
t
RW
DD
S
IH
IL
= 0, T
amplitude tone. LA = LB = GND. No load. WB is at midscale with a 10pF load.
DD
A
MAX5391L/MAX5393L
MAX5391M/MAX5393M
MAX5391N/MAX5393N
f
V
V
V
V
V
V
CLK
DD
DD
DD
DD
DD
DD
= T
= +1.7V, the wiper terminal is driven with a source current of 150FA for the
A
= 5.5V
= 1.7V
= 2.6V to 5.5V
= 1.7V to 2.6V
= 2.6V to 5.5V
= 1.7V to 2.6V
= 600kHz, C
= +25NC. Specifications over temperature limits are guaranteed by design
MIN
to T
MAX
CONDITIONS
OUT
, unless otherwise noted. Typical values are at V
= 0nF
100
100
MIN
1.7
40
40
40
40
10
40
27
12
70
75
-1
0
0
1200
2200
TYP
400
200
5
MAX
DD
5.5
+1
10
30
25
DD
DD
and L_ =
, L_ = GND,
DD
= +5V, the
% x V
% x V
= +1.8V,
UNITS
nV
MHz
FA
FA
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
P-P
DD
DD
3