ISL95810WIU8Z Intersil, ISL95810WIU8Z Datasheet - Page 11

IC POT DGTL 10K OHM 8-MSOP

ISL95810WIU8Z

Manufacturer Part Number
ISL95810WIU8Z
Description
IC POT DGTL 10K OHM 8-MSOP
Manufacturer
Intersil
Series
XDCP™r
Datasheet

Specifications of ISL95810WIU8Z

Taps
256
Resistance (ohms)
10K
Number Of Circuits
1
Temperature Coefficient
45 ppm/°C Typical
Memory Type
Non-Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Resistance In Ohms
10K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL95810WIU8Z
Manufacturer:
Intersil
Quantity:
180
Part Number:
ISL95810WIU8Z
Manufacturer:
Intersil
Quantity:
400
ISL95810
received. If the Address Byte is 0 or 2, the Data Byte is
transferred to the Wiper Register (WR) or to the Access
Control Register respectively, at the falling edge of the SCL
pulse that loads the last bit (LSB) of the Data Byte. If the
Address Byte is 0, and the Access Control Register is all
zeros (default), then the STOP condition initiates the internal
write cycle to non-volatile memory.
Read Operation
A Read operation consist of a three byte instruction followed
by one or more Data Bytes (See Figure 18). The master
initiates the operation issuing the following sequence: a
START, the Identification byte with the R/W bit set to “0”, an
Address Byte, a second START, and a second Identification
byte with the R/W bit set to “1”. After each of the three bytes,
the ISL95810 responds with an ACK. Then the ISL95810
then transmits the Data Byte. The master then terminates
the read operation (issuing a STOP condition) following the
last bit of the Data Byte (See Figure 18).
The byte at address 02h determines if the Data Bytes being
read are from volatile or non-volatile memory (See “Memory
Description” on page 8.)
11
FN8090.2
September 19, 2006

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