LTC1410CG Linear Technology, LTC1410CG Datasheet - Page 6

• Manufacturer Part Number: LTC1410CG
• Description: IC A/D CONV 12BIT SAMPLNG 28SSOP
• Manufacturer: Linear Technology

Specifications of LTC1410CG

• Number Of Bits: 12
• Sampling Rate (per Second): 1.25M
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 230mW
• Voltage Supply Source: Dual ±
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP (0.200", 5.30mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

PI FU CTIO S
FU CTIO AL BLOCK DIAGRA
LTC1410
+ A
– A
V
REFCOMP (Pin 4): 4.06V Reference Bypass Pin. By-
pass to AGND with 10 F tantalum in parallel with 0.1 F
ceramic.
AGND (Pin 5): Analog Ground.
D11 to D4 (Pins 6 to 13): Three-State Data Outputs.
DGND (Pin 14): Digital Ground for Internal Logic. Tie to
AGND.
D3 to D0 (Pins 15 to 18): Three-State Data Outputs.
OGND (Pin 19): Digital Ground for Output Drivers. Tie
to AGND.
NAP/SLP (Pin 20): Power Shutdown Mode. Selects the
mode invoked by the SHDN pin. Low selects Sleep
mode and high selects quick wake-up Nap mode.
6
REF
U
IN
IN
U
(Pin 1): Positive Analog Input, 2.5V.
(Pin 2): Negative Analog Input, 2.5V.
(Pin 3): 2.50V Reference Output.
REFCOMP
U
AGND
DGND
+A
– A
V
(4V)
REF
IN
IN
U
U
2k
2.5V REF
REF AMP
INTERNAL
CLOCK
NAP/SLP
W
12-BIT CAPACITIVE DAC
SUCCESSIVE APPROXIMATION
C
C
SHDN
SAMPLE
SAMPLE
CONTROL LOGIC
REGISTER
CONVST RD
SHDN (Pin 21): Power Shutdown Input. A low logic
level will invoke the Shutdown mode selected by the
NAP/SLP pin.
RD (Pin 22): Read Input. This enables the output
drivers when CS is low.
CONVST (Pin 23): Conversion Start Signal. This active
low signal starts a conversion on its falling edge.
CS (Pin 24): The Chip Select input must be low for the
ADC to recognize CONVST and RD inputs.
BUSY (Pin 25): The BUSY output shows the converter
status. It is low when a conversion is in progress. Data
valid on the rising edge of BUSY.
V
with 10 F tantalum in parallel 0.1 F ceramic.
DV
AV
with 10 F tantalum in parallel with 0.1 F ceramic.
SS
DD
DD
(Pin 26): – 5V Negative Supply. Bypass to AGND
(Pin 27): 5V Positive Supply. Short to Pin 28.
(Pin 28): 5V Positive Supply. Bypass to AGND
CS
BUSY
12
ZEROING SWITCHES
+
–
COMP
OUTPUT LATCHES
•
•
•
LTC1410 • BD
D11
D0
AV
DV
V
SS
DD
DD