LTC1410CG Linear Technology, LTC1410CG Datasheet - Page 12

IC A/D CONV 12BIT SAMPLNG 28SSOP

LTC1410CG

Manufacturer Part Number
LTC1410CG
Description
IC A/D CONV 12BIT SAMPLNG 28SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC1410CG

Number Of Bits
12
Sampling Rate (per Second)
1.25M
Data Interface
Parallel
Number Of Converters
1
Power Dissipation (max)
230mW
Voltage Supply Source
Dual ±
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SSOP (0.200", 5.30mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC1410CG
Manufacturer:
Linear
Quantity:
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Part Number:
LTC1410CG
Manufacturer:
LINEAR/凌特
Quantity:
20 000
LTC1410
APPLICATIONS
High quality tantalum and ceramic bypass capacitors
should be used at the V
shown in the Typical Application on the first page of this
data sheet. Bypass capacitors must be located as close to
the pins as possible. The traces connecting the pins and
bypass capacitors must be kept short and should be made
as wide as possible.
The LTC1410 has differential inputs to minimize noise
coupling. Common mode noise on the + A
leads will be rejected by the input CMRR. The – A
can be used as a ground sense for the + A
LTC1410 will hold and convert the difference voltage
between + A
(Pin 2) should be kept as short as possible. In applications
where this is not possible, the + A
be run side by side to equalize coupling.
A single point analog ground separate from the logic
system ground should be established with an analog
ground plane at Pin 5 (AGND) or as close as possible to the
ADC. Pin 14 and Pin 19 (ADC’s DGND) and all other analog
grounds should be connected to this single analog ground
point. No other digital grounds should be connected to this
analog ground point. Low impedance analog and digital
power supply common returns are essential to low noise
operation of the ADC and the foil width for these tracks
should be as wide as possible. In applications where the
12
CIRCUITRY
IN
ANALOG
INPUT
and – A
U
+
IN
. The leads to + A
DD
INFORMATION
1
2
U
+ A
– A
, V
IN
IN
SS
10 F
IN
and REFCOMP pins as
REFCOMP
and – A
W
4
IN
0.1 F
Figure 11. Power Supply Grounding Practice
(Pin 1) and – A
IN
AGND
traces should
IN
IN
U
input; the
and – A
IN
10 F
input
IN
IN
LTC1410
V
SS
26
0.1 F
ADC data outputs and control signals are connected to a
continuously active microprocessor bus, it is possible to
get errors in the conversion results. These errors are due
to feedthrough from the microprocessor to the successive
approximation comparator. The problem can be elimi-
nated by forcing the microprocessor into a wait state
during conversion or by using three-state buffers to iso-
late the ADC data bus.
DIGITAL INTERFACE
The A/D converter is designed to interface with micropro-
cessors as a memory mapped device. The CS and RD
control inputs are common to all peripheral memory
interfacing. A separate CONVST is used to initiate a con-
version.
Internal Clock
The A/D converter has an internal clock that eliminates the
need of synchronization between the external clock and
the CS and RD signals found in other ADCs. The internal
clock is factory trimmed to achieve a typical conversion
time of 0.65 s and a maximum conversion time over the
full operating temperature range of 0.75 s. No external
adjustments are required. The guaranteed maximum ac-
quisition time is 100ns. In addition, throughput time of
800ns and a minimum sampling rate of 1.25Msps is
guaranteed.
10 F
AV
DD
28
0.1 F
DV
DD
27
DGND OGND
14
19
SYSTEM
DIGITAL
1410 F11

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