LTC1410CG Linear Technology, LTC1410CG Datasheet - Page 4

• Manufacturer Part Number: LTC1410CG
• Description: IC A/D CONV 12BIT SAMPLNG 28SSOP
• Manufacturer: Linear Technology

Specifications of LTC1410CG

• Number Of Bits: 12
• Sampling Rate (per Second): 1.25M
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 230mW
• Voltage Supply Source: Dual ±
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP (0.200", 5.30mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

POWER REQUIRE E TS
TI I G CHARACTERISTICS
LTC1410
otherwise specifications are at T
SYMBOL
P
SYMBOL
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
range, otherwise specifications are at T
4
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with DGND, OGND
and AGND wired together unless otherwise noted.
Note 3: When these pin voltages are taken below V
will be clamped by internal diodes. This product can handle input currents
greater than 100mA below V
Note 4: When these pin voltages are taken below V
by internal diodes. This product can handle input currents greater than
100mA below V
Note 5: V
otherwise specified.
Note 6: Linearity, offset and full-scale specifications apply for a single-
ended +A
SAMPLE(MAX)
CONV
ACQ
ACQ+CONV
1
2
3
4
5
6
7
8
9
10
11
12
13
14
D
W U
DD
IN
input with – A
= 5V, V
SS
PARAMETER
Maximum Sampling Frequency
Conversion Time
Acquisition Time
Throughput Time
(Acquisition + Conversion)
CS to RD Setup Time
CS to CONVST Setup Time
NAP/SLP to SHDN Setup Time
SHDN to CONVST Wake-Up Time (Note 10)
CONVST Low Time
CONVST to BUSY Delay
Data Ready Before BUSY
Delay Between Conversions
Wait Time RD After BUSY
Data Access Time After RD
Bus Relinquish Time
RD Low Time
CONVST High Time
Aperture Delay of Sample-and-Hold
PARAMETER
Power Dissipation
without latchup. These pins are not clamped to V
Nap Mode
Sleep Mode
SS
= – 5V, f
IN
grounded.
SS
SAMPLE
or above V
A
= 1.25MHz, t
W U
= 25 C. (Note 5)
DD
without latchup.
A
= 25 C. (Note 5)
SS
SS
r
= t
, they will be clamped
or above V
CONDITIONS
SHDN = 0V, NAP/SLP = 5V
SHDN = 0V, NAP/SLP = 0V
CONDITIONS
(Notes 9, 10)
(Notes 9, 10)
(Notes 9, 10)
(Notes 10, 11)
C
(Note 10)
(Note 10)
C
C
Commercial
Industrial
f
The
L
L
L
= 5ns unless
= 25pF
= 25pF
= 100pF
The
denotes specifications which apply over the full operating temperature range,
DD
, they
denotes specifications which apply over the full operating temperature
DD
.
Note 7: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8: Bipolar offset is the offset voltage measured from – 0.5LSB when
the output code flickers between 0000 0000 0000 and 1111 1111 1111.
Note 9: Guaranteed by design, not subject to test.
Note 10: Recommended operating conditions.
Note 11: The falling CONVST edge starts a conversion. If CONVST returns
high at a critical point during the conversion it can create small errors. For
best results ensure that CONVST returns high either within 425ns after the
start of the conversion or after BUSY rises.
Note 12: Signal-to-noise ratio (SNR) is measured at 100kHz and distortion
is measured at 600kHz. These results are used to calculate signal-to-noise
plus distortion (SINAD).
MIN
MIN
1.25
– 5
t
10
10
40
20
15
40
40
0
10
– 1.5
TYP
TYP
0.01
650
200
160
7.5
50
10
35
15
20
8
MAX
MAX
750
100
800
230
50
25
35
35
50
20
25
30
12
1
UNITS
UNITS
MHz
mW
mW
mW
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns