CS5566-ISZ Cirrus Logic Inc, CS5566-ISZ Datasheet - Page 28

IC ADC 24BIT 1CH 5KSPS 24SSOP

CS5566-ISZ

Manufacturer Part Number
CS5566-ISZ
Description
IC ADC 24BIT 1CH 5KSPS 24SSOP
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5566-ISZ

Package / Case
24-SSOP
Number Of Bits
24
Data Interface
Serial
Number Of Converters
1
Voltage Supply Source
Dual ±
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Architecture
Delta-Sigma
Conversion Rate
50 KSPs
Input Type
Voltage
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1557 - BOARD EVAL FOR CS5566 ADC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1269-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS5566-ISZ
Manufacturer:
CIRRUS
Quantity:
76
3/25/08
CS5566
SCLK – Serial Clock Input/Output, Pin 23
The SMODE pin determines whether the SCLK signal is an input or an output signal. SCLK
determines the rate at which data is clocked out of the SDO pin. If the converter is in SSC
mode, the SCLK frequency will be determined by the master clock frequency of the converter
(either MCLK or the internal oscillator). In SEC mode, the user determines the SCLK frequency.
If SMODE = VL (SSC Mode), SCLK will be in a high-impedance state when CS is high.
RDY – Ready, Pin 24
If CONV is low the converter will immediately start a conversion and RDY will remain high until
the conversion is completed. At the end of any conversion RDY falls to indicate that a conver-
sion word has been placed into the serial port. RDY will return high after all data bits are shifted
out of the serial port or two master clock cycles before new data becomes available if the CS pin
is inactive (high); or two master clock cycles before new data becomes available if the user
holds CS low but has not started reading the data from the converter when in SEC mode.
28
DS806PP1

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