CS5530-ISZ Cirrus Logic Inc, CS5530-ISZ Datasheet - Page 33

IC ADC 24BIT 1CH W/LNA 20SSOP

CS5530-ISZ

Manufacturer Part Number
CS5530-ISZ
Description
IC ADC 24BIT 1CH W/LNA 20SSOP
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5530-ISZ

Number Of Converters
1
Package / Case
20-SSOP
Number Of Bits
24
Sampling Rate (per Second)
3.84k
Data Interface
Serial
Power Dissipation (max)
45mW
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Adc Inputs
1
Architecture
Delta-Sigma
Conversion Rate
6.25 SPs to 3840 SPs
Resolution
24 bit
Input Type
Voltage
Interface Type
Serial (3-Wire)
Voltage Reference
2.5 V
Maximum Power Dissipation
500 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1158 - BOARD EVAL FOR CS5530
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1283-5

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Measurement and Reference Inputs
AIN1+, AIN1- – Differential Analog Input
VREF+, VREF- – Voltage Reference Input
C1, C2 – Amplifier Capacitor Inputs
Power Supply Connections
VA+ – Positive Analog Power
VD+ – Positive Digital Power
VA- – Negative Analog Power
DGND – Digital Ground
4. SPECIFICATION DEFINITIONS
Linearity Error
Differential Nonlinearity
Full-scale Error
Unipolar Offset
Bipolar Offset
DS742F3
Differential input pins into the device.
Fully differential inputs which establish the voltage reference for the on-chip modulator.
Connections for the instrumentation amplifier’s capacitor.
Positive analog supply voltage.
Positive digital supply voltage (nominally +3.0 V or +5 V).
Negative analog supply voltage.
Digital Ground.
The deviation of a code from a straight line which connects the two endpoints of the ADC
transfer function. One endpoint is located 1/2 LSB below the first code transition and the other
endpoint is located 1/2 LSB beyond the code transition to all ones. Units in percent of full-
scale.
The deviation of a code's width from the ideal width. Units in LSBs.
The deviation of the last code transition from the ideal [{(VREF+) - (VREF-)} - 3/2 LSB]. Units
are in LSBs.
The deviation of the first code transition from the ideal (1/2 LSB above the voltage on the AIN-
pin.). When in unipolar mode (U/B bit = 1). Units are in LSBs.
The deviation of the mid-scale transition (111...111 to 000...000) from the ideal (1/2 LSB below
the voltage on the AIN- pin). When in bipolar mode (U/B bit = 0). Units are in LSBs.
CS5530
33

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