CS5530-ISZ Cirrus Logic Inc, CS5530-ISZ Datasheet - Page 19

• Manufacturer Part Number: CS5530-ISZ
• Description: IC ADC 24BIT 1CH W/LNA 20SSOP
• Manufacturer: Cirrus Logic Inc

Specifications of CS5530-ISZ

• Number Of Converters: 1
• Package / Case: 20-SSOP
• Number Of Bits: 24
• Sampling Rate (per Second): 3.84k
• Data Interface: Serial
• Power Dissipation (max): 45mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 1
• Architecture: Delta-Sigma
• Conversion Rate: 6.25 SPs to 3840 SPs
• Resolution: 24 bit
• Input Type: Voltage
• Interface Type: Serial (3-Wire)
• Voltage Reference: 2.5 V
• Maximum Power Dissipation: 500 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1158 - BOARD EVAL FOR CS5530
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1283-5

2.3.10 Configuration Register Description
DS742F3
D31(MSB) D30
PSS
D15
NU
PSS (Power Save Select)[31]
PDW (Power Down Mode)[30]
RS (Reset System)[29]
RV (Reset Valid)[28]
IS (Input Short)[27]
NU (Not Used)[26]
VRS (Voltage Reference Select)[25]
A1-A0 (Output Latch bits)[24:23]
NU (Not Used)[22:20]
Filter Rate Select, FRS[19]
NU (Not Used)[18:15]
0
1
0
1
0
1
0
1
0
1
0
0
1
00
01
10
11
0
0
1
0
PDW
WR3
D14
WR2
D29
D13
RS
Standby Mode (Oscillator active, allows quick power-up).
Sleep Mode (Oscillator inactive).
Normal Mode
Activate the power save select mode.
Normal Operation.
Activate a Reset cycle. See System Reset Sequence in the datasheet text.
Normal Operation
System was reset. This bit is read only. Bit is cleared to logic zero after the configuration register is read.
Normal Input
All signal input pairs for each channel are disconnected from the pins and shorted internally.
Must always be logic 0. Reserved for future upgrades.
2.5 V < V
1 V ≤ V
The latch bits (A1 and A0) will be set to the logic state of these bits when the Configuration register is written.
Note that these logic outputs are powered from VA+ and VA-.
A1 = 0, A0 = 0
A1 = 0, A0 = 1
A1 = 1, A0 = 0
A1 = 1, A0 = 1
Must always be logic 0. Reserved for future upgrades.
Use the default output word rates.
Scale all output word rates and their corresponding filter characteristics by a factor of 5/6.
Must always be logic 0. Reserved for future upgrades.
WR1
D28
D12
RV
REF
REF
≤ 2.5V
WR0 UP/BP OCD
D27
D11
≤ [(VA+) - (VA-)]
IS
D26
D10
NU
VRS
D25
D9
D24
NU
D8
A1
D23
NU
D7
A0
D22
NU
NU
D6
D21
NU
NU
D5
D20
NU
NU
D4
FRS
D19
NU
D3
D18
NU
NU
D2
CS5530
D17
NU
NU
D1
D16
NU
NU
D0
19