AD7992BRMZ-1 Analog Devices Inc, AD7992BRMZ-1 Datasheet - Page 18

• Manufacturer Part Number: AD7992BRMZ-1
• Description: IC ADC 12BIT 2CHAN I2C 10-MSOP
• Manufacturer: Analog Devices Inc

Specifications of AD7992BRMZ-1

• Data Interface: I²C, Serial
• Operating Temperature: -40°C ~ 125°C
• Number Of Bits: 12
• Sampling Rate (per Second): 79k
• Number Of Converters: 1
• Power Dissipation (max): 2.2mW
• Voltage Supply Source: Single Supply
• Mounting Type: Surface Mount
• Package / Case: 10-TFSOP (0.118", 3.00mm Width)
• Resolution (bits): 12bit
• Input Channel Type: Single Ended
• Supply Voltage Range - Analogue: 2.7V To 5.5V
• Supply Current: 1.4mA
• No. Of Pins: 10
• Sampling Rate: 188kSPS
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-AD7992CB - BOARD EVALUATION FOR AD7992
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD7992
CONVERSION RESULT REGISTER
The conversion result register is a 16-bit, read-only register that
stores the conversion result from the ADC in straight binary
format. A 2-byte read is needed to read data from this register.
Table 12 shows the contents of the first byte to be read from the
AD7992, and Table 13 shows the contents of the second byte.
Table 12. Conversion Value Register (First Read)
D15
Alert_Flag
Table 13. Conversion Value Register (Second Read)
D7
B7
The AD7992 conversion result consists of an Alert_Flag bit, two
leading zeros, a channel identifier bit, and the 12-bit data result.
The Alert_Flag bit indicates whether the conversion result
being read or any other channel result has violated the limit
registers associated with it. If an ALERT occurs, the master may
wish to read the ALERT status register to obtain more informa-
tion on where the ALERT occurred if the Alert_Flag bit is set.
The Alert_Flag bit is followed by two leading zeros and a
channel identifier bit that indicate to which channel the con-
version result corresponds. When this bit is 0, the conversion
result corresponds to V
result corresponds to V
12-bit conversion result, MSB first.
LIMIT REGISTERS
The AD7992 has two pairs of limit registers. Each pair stores
high and low conversion limits for both analog input channels.
Each pair of limit registers has one associated hysteresis register.
All 6 registers are 16 bits wide; only the 12 LSBs of the registers
are used. On power-up, the contents of the DATA
for each channel are full scale, while the contents of the
DATA
The limit registers can be used to monitor the conversion
results on one or both channels. The AD7992 signals an
ALERT (in either hardware or software or both, depending
on the configuration) if the result moves outside the upper or
lower limit set by the user.
DATA
The DATA
register; only the 12 LSBs of each register are used. This register
stores the upper limit that activates the ALERT output and/or
the Alert_Flag bit in the conversion result register. If the value
in the conversion result register is greater than the value in the
DATA
result returns to a value at least N LSB below the DATA
register value, the ALERT output pin and Alert_Flag bit are
LOW
HIGH
HIGH
D6
B6
registers are zero scale by default.
Register CH1/CH2
register, an ALERT occurs. When the conversion
HIGH
D14
Zero
register for a channel is a 16-bit, read/write
D5
B5
D13
Zero
IN
IN
1, and when it is 1, the conversion
2. These, in turn, are followed by the
D4
B4
D12
CH
ID0
D3
B3
D11
MSB
D2
B2
D10
B10
HIGH
D1
B1
register
D9
B9
HIGH
D0
B0
Rev. 0 | Page 18 of 28
D8
B8
reset. The value of N is taken from the 12-bit hysteresis register
associated with that channel. The ALERT pin can also be reset
by writing to Bits D2 and D1 in the configuration register.
Table 14. AD7992 DATA
D15
0
Table 15. AD7992 DATA
D7
B7
DATA
The DATA
register; only the 12 LSB of each register are used. The register
stores the lower limit that activates the ALERT output and/or
the Alert_Flag bit in the conversion result register. If the value
in the conversion result register is less than the value in the
DATA
result returns to a value at least N LSB above the DATA
register value, the ALERT output pin and Alert_Flag bit are
reset. The value of N is taken from the hysteresis register
associated with that channel. The ALERT output pin can also be
reset by writing to Bits D2 and D1 in the configuration register.
Table 16. DATA
D15
0
Table 17. DATA
D7
B7
Hysteresis Register (CH1/CH2)
Each hysteresis register is a 16-bit read/write register; only
the 12 LSBs of the register are used. The hysteresis register
stores the hysteresis value, N, when using the limit registers.
Each pair of limit registers has a dedicated hysteresis register.
The hysteresis value determines the reset point for the ALERT
pin/Alert_Flag if a violation of the limits has occurred. For
example, if a hysteresis value of 8 LSB is required on the
upper and lower limits of Channel 1, the 16 bit word,
0000 0000 0000 1000, should be written to the hysteresis
register of CH1 (see Table 8 for the address of this register).
On power-up, the hysteresis registers contain a value of 8 LSB.
If a different hysteresis value is required, that value must be
written to the hysteresis register for the channel in question.
Table 18. Hysteresis Register (First Read/Write)
D15
0
Table 19. Hysteresis Register (Second Read/Write)
D7
B7
LOW
LOW
D14
0
D6
B6
D14
0
D6
B6
D14
0
D6
B6
Register CH1/CH2
register, an ALERT occurs. When the conversion
LOW
register for each channel is a 16-bit read/write
D13
0
D5
B5
D13
0
D5
B5
D13
0
D5
B5
LOW
LOW
Register (First Read/Write)
Register (Second Read/Write)
D12
0
D4
D12
0
D4
B4
D4
B4
B4
D12
0
HIGH
HIGH
Register (First Read/Write)
Register (Second Read/Write)
D11
B11
D3
B3
D11
B11
D3
B3
D11
B11
D3
B3
D10
B10
D2
B2
D10
B10
D2
B2
D10
B10
D2
B2
D9
B9
D1
B1
D9
B9
D1
B1
D9
B9
D1
B1
LOW
D8
B8
D0
B0
D8
B8
D0
B0
D8
B8
D0
B0