M41T65Q6F STMicroelectronics, M41T65Q6F Datasheet - Page 26

• Manufacturer Part Number: M41T65Q6F
• Description: IC RTC SERIAL W/ALARM 16QFN
• Manufacturer: STMicroelectronics
• Type: Clock/Calendar/Alarmr

Specifications of M41T65Q6F

• Memory Size: 16B
• Time Format: HH:MM:SS:hh (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.3 V ~ 4.4 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-QFN
• Function: Clock/Calendar/Alarm/Timer Interrupt
• Rtc Memory Size: 16 Byte
• Supply Voltage (max): 4.4 V
• Supply Voltage (min): 1.3 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Serial (2-Wire, I2C)
• Supply Current: 50 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-3908-2

Clock operation
3.3
Note:
26/43
Setting alarm clock registers
Address locations 0Ah-0Eh contain the alarm settings. The alarm can be configured to go
off at a prescribed time on a specific month, date, hour, minute, or second, or repeat every
year, month, day, hour, minute, or second. Bits RPT5–RPT1 put the alarm in the repeat
mode of operation.
in the table default to the once per second mode to quickly alert the user of an incorrect
alarm setting.
When the clock information matches the alarm clock settings based on the match criteria
defined by RPT5–RPT1, the AF (alarm flag) is set. If AFE (alarm flag enable) is also set
(M41T62/65), the alarm condition activates the IRQ/OUT or IRQ/FT/OUT pin. To disable the
alarm, write '0' to the alarm date register and to RPT5–RPT1.
If the address pointer is allowed to increment to the flag register address, an alarm condition
will not cause the interrupt/flag to occur until the address pointer is moved to a different
address. It should also be noted that if the last address written is the “Alarm Seconds,” the
address pointer will increment to the flag address, causing this situation to occur.
The IRQ output is cleared by a READ to the flags register as shown in
page
alarm flag has been reset to '0.'
Figure 23. Alarm interrupt reset waveform
Table 7.
Register address
ALARM FLAG BIT (AF)
IRQ/OUT or
IRQ/FT/OUT
RPT5
1
1
1
1
1
0
26. A subsequent READ of the flags register is necessary to see that the value of the
Alarm repeat modes
RPT4
1
1
1
1
0
0
0Eh
Table 7 on page 26
RPT3
1
1
1
0
0
0
Doc ID 10397 Rev 15
RPT2
shows the possible configurations. Codes not listed
1
1
0
0
0
0
0Fh
RPT1
1
0
0
0
0
0
Once per second
Once per minute
Once per month
Alarm setting
Once per hour
Once per year
Once per day
Figure 23 on
M41T62/63/64/65
HIGH-Z
00h
AI08898