SI5325C-C-GM Silicon Laboratories Inc, SI5325C-C-GM Datasheet - Page 5

• Manufacturer Part Number: SI5325C-C-GM
• Description: IC UP-PROG CLK MULTIPLIER 36-QFN
• Manufacturer: Silicon Laboratories Inc
• Type: Clock Multiplierr

Specifications of SI5325C-C-GM

• Number Of Circuits: 1
• Package / Case: 36-QFN
• Pll: Yes
• Input: Clock
• Output: CML, CMOS, LVDS, LVPECL
• Ratio - Input:output: 2:2
• Differential - Input:output: Yes/Yes
• Frequency - Max: 346MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 1.71 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Frequency-max: 346MHz
• Maximum Input Frequency: 710 MHz
• Minimum Input Frequency: 10 MHz
• Output Frequency Range: 10 MHz to 346 MHz
• Supply Voltage (max): 3.63 V
• Supply Voltage (min): 1.71 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 1.8 V, 2.5 V, 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 1. Performance Specifications (Continued)
(V
Table 2. Absolute Maximum Ratings
PLL Performance
Jitter Generation
Jitter Transfer
Phase Noise
Subharmonic Noise
Spurious Noise
Package
Thermal Resistance
Junction to Ambient
Note: For a more comprehensive listing of device specifications, please consult the Silicon Laboratories Any-Frequency
DC Supply Voltage
LVCMOS Input Voltage
CKINn Voltage Level Limits
Operating Junction Temperature
Storage Temperature Range
ESD HBM Tolerance (100 pF, 1.5 kΩ); All pins except
CKIN+/CKIN–
ESD MM Tolerance; All pins except CKIN+/CKIN–
ESD HBM Tolerance (100 pF, 1.5 kΩ); CKIN+/CKIN–
ESD MM Tolerance; CKIN+/CKIN–
Latch-Up Tolerance
Note: Permanent device damage may occur if the Absolute Maximum Ratings are exceeded. Functional operation should be
DD
= 1.8 ±5%, 2.5 ±10%, or 3.3 V ±10%, T
Precision Clock Family Reference Manual. This document can be downloaded from
Documentation)
restricted to the conditions as specified in the operation sections of this data sheet. Exposure to absolute maximum
rating conditions for extended periods of time may affect device reliability.
Parameter
.
Parameter
Symbol
SP
SP
CKO
J
J

GEN
SUBH
SPUR
PK
JA
PN
A
= –40 to 85 ºC)
(n > 1, n x F3 < 100 MHz)
f
Phase Noise @ 100 kHz
f
IN
IN
LVPECL output format
Max spur @ n x F3
= f
= f
Preliminary Rev. 0.4
50 kHz–80 MHz
12 kHz–20 MHz
Test Condition
100 kHz offset
OUT
100 Hz offset
OUT
10 kHz offset
1 MHz offset
1 kHz offset
Still Air
Offset
= 622.08 MHz,
= 622.08 MHz
Symbol
CKN
T
V
T
V
STG
JCT
DIG
DD
VIN
Min
—
—
—
—
—
—
—
—
—
—
—
–0.3 to (V
www.silabs.com/timing
–0.5 to 3.8
–55 to 150
–55 to 150
0 to V
JESD78 Compliant
Value
–113
–118
–132
0.47
0.48
0.05
150
750
100
Typ
–85
–90
–88
–93
38
2
DD
DD
+ 0.3)
Max
0.1
Si5325
—
—
—
—
—
—
—
—
—
—
(click on
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
ps rms
ps rms
Unit
ºC/W
kV
Unit
C
C
dBc
dBc
V
V
V
V
V
V
dB
5