SI5325C-C-GM Silicon Laboratories Inc, SI5325C-C-GM Datasheet - Page 14

IC UP-PROG CLK MULTIPLIER 36-QFN

SI5325C-C-GM

Manufacturer Part Number
SI5325C-C-GM
Description
IC UP-PROG CLK MULTIPLIER 36-QFN
Manufacturer
Silicon Laboratories Inc
Type
Clock Multiplierr
Datasheet

Specifications of SI5325C-C-GM

Number Of Circuits
1
Package / Case
36-QFN
Pll
Yes
Input
Clock
Output
CML, CMOS, LVDS, LVPECL
Ratio - Input:output
2:2
Differential - Input:output
Yes/Yes
Frequency - Max
346MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
1.71 V ~ 3.63 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Frequency-max
346MHz
Maximum Input Frequency
710 MHz
Minimum Input Frequency
10 MHz
Output Frequency Range
10 MHz to 346 MHz
Supply Voltage (max)
3.63 V
Supply Voltage (min)
1.71 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI5325C-C-GM
Manufacturer:
SILICONLABS/芯科
Quantity:
20 000
Si5325
4. Register Descriptions
Reset value = 0001 0100
14
Register 0.
Name
Type
Bit
7:6
4:2
Bit
5
1
0
ALWAYS_ON
Reserved
BYPASS_
Reserved
Reserved
Reserved
CKOUT_
Name
D7
REG
R
Reserved
Reserved.
CKOUT Always On.
This will bypass the SQ_ICAL function. Output will be available even if SQ_ICAL is on
and ICAL is not complete or successful. See Table 4 on page 46.
0: Squelch output until part is calibrated (ICAL).
1: Provide an output. Note: The frequency may be significantly off until the part is cali-
brated.
Reserved.
Bypass Register.
This bit enables or disables the PLL bypass mode. Use only when the device is in VCO
freeze or before the first ICAL. Bypass mode is not supported for CMOS output clocks.
0: Normal operation
1: Bypass mode. Selected input clock is connected to CKOUT buffers, bypassing PLL.
Reserved.
D6
R
ALWAYS_
CKOUT_
R/W
ON
D5
Preliminary Rev. 0.4
Reserved
D4
R
Reserved
Function
D3
R
Reserved
D2
R
BYPASS_
REG
R/W
D1
Reserved
D0
R

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