NB6L295MNTXG ON Semiconductor, NB6L295MNTXG Datasheet - Page 6

• Manufacturer Part Number: NB6L295MNTXG
• Description: IC CLOCK/DATA DELAY 2CH 24-QFN
• Manufacturer: ON Semiconductor
• Type: Programmable Delay Chipr

Specifications of NB6L295MNTXG

• Input: CML, LVDS, LVPECL
• Output: CML
• Frequency - Max: 1.5GHz
• Voltage - Supply: 2.4 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TFQFN Exposed Pad
• Frequency-max: 1.5GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
10. Measured by forcing V
11. Duty cycle skew is measured between differential outputs using the deviations of the sum of T
12. Deviation from a linear delay (actual Min to Max) in the Dual Mode 511 programmable steps.
13. Additive random CLOCK jitter with 50% duty cycle input clock signal.
14. NRZ data at PRBS23 and K28.5.
15. Input and output voltage swing is a single−ended measurement operating in differential mode.
Table 5. AC CHARACTERISTICS
Symbol
V
f
t
t
L
t
t
t
t
V
t
DATA
Range
SKEW
s
h
pwmin
JITTER
r,
f
in
OUTPP
INPP
SCLK
R
t
f
L
= 50 W to V
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Serial Clock Input Frequency, 50% Duty Cycle
Output Voltage Amplitude (@ V
Maximum Data Rate (Note 14)
Programmable Delay Range (@ 50 MHz)
Duty Cycle Skew (Note 11)
Within Device Skew − Dual Mode
Linearity (Note 12)
Setup Time (@ 20 MHz)
Hold Time
Minimum Pulse Width SLOAD
Random Clock Jitter RMS; SETMIN to SETMAX (Note 13)
Deterministic Jitter; SETMIN to SETMAX (Note 14)
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 15)
Output Rise/Fall Times (@ 50 MHz), (20% − 80%) Qx, Qx
Dual Mode
Extended Mode
Dual Mode
Extended Mode
Dual Mode
CC
. See Figure 20. Input edge rates 40 ps (20% − 80%).
INPPmin
and V
INPPmax
V
CC
INPPmin
Characteristic
= V
from a 50% duty cycle clock source, V
CC0
) f
IN0/IN0 to Q0/Q0 or IN1/IN1 to Q1/Q1
IN0/IN0 to Q0/Q0 or IN1/IN1 to Q1/Q1
IN0/IN0 to Q0/Q0 or IN1/IN1 to Q1/Q1
in
= V
≤ 1.5 GHz (Note 15) (See Figure 22)
CC1
http://onsemi.com
= 2.375 V to 3.6 V, GND = 0 V, T
6
IN0/IN0 to Q1/Q1
IN0/IN0 to Q1/Q1
f
SLOAD to SCLK
SLOAD to SCLK
DATA
SDIN to SCLK
SDIN to SCLK
EN to SLOAD
f
in
EN to SDIN
≤ 2.5 Gbps
≤ 1.5 GHz
D[8:0] = 0
D[8:0] = 1
CMR
(min+max). All loading with an external
A
= −40°C to +85°C (Note 10)
pw
Min
530
150
2.5
0.5
1.5
0.5
1.0
1.0
0.5
85
0
0
0
1
− and T
pw
$15
+ @ 0.5 GHz.
11.2
Typ
780
120
5.7
0.3
1.0
0.6
60
60
20
2
3
6
V
GND
$20
Max
13.7
100
175
170
6.9
CC
20
10
20
30
5
−
Gb/s
MHz
Unit
mV
mV
ns
ps
ps
ns
ns
ns
ps
ps