SCAN926260TUF National Semiconductor, SCAN926260TUF Datasheet - Page 4

• Manufacturer Part Number: SCAN926260TUF
• Manufacturer: National Semiconductor

Specifications of SCAN926260TUF

• Number Of Elements: 6
• Input Type: CMOS/TTL
• Operating Supply Voltage (typ): 3.3V
• Differential Input High Threshold Voltage: 50mV
• Diff. Input Low Threshold Volt: -50mV
• Output Type: Deserializer
• Transmission Data Rate: 660Mbps
• Power Dissipation: 3.7W
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: LBGA
• Number Of Receivers: 1
• Number Of Drivers: 10
• Lead Free Status / RoHS Status: Not Compliant

www.national.com
f
t
t
t
t
t
t
t
MAX
S
H
S
H
W
W
REC
Symbol
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Typical values are given for VDD = 3.3V and TA =25°C
Note 3: Current into the device pins is defined as positive. Current out of device pins is defined as negative. Voltages are referenced to ground except VTH and
VTL which are differential voltages.
Note 4: Total Supply Current when Powered Down (I
into TRI-STATE upon loss-of-lock, whereas the SCAN926260 now asserts ROUTn and RCLKn HIGH upon loss-of-lock.
Note 5: t
Note 6: t
Note 7: For the purpose of specifying deserializer PLL performance, t
of the incoming data stream (SYNCPATs). t
t
receiving synchronization patterns (SYNCPATs). The time to lock to random data is dependent upon the incoming data and is not specified.
Note 8: t
The Deserializer noise margin specification does not include transmitter jitter and is Guaranteed By Statistical Analysis (GBSA). Please see Figure 8 for a graphical
representation.
SCAN Circuitry Timing Requirements
DSR2
is the time required to indicate lock for the powered-up and enabled deserializer when the input (RI+ and RI−) conditions change from not receiving data to
RDC
CLH
RNMI-LEFT
and t
was specified by measuring the positive pulse on the RCLK and dividing this number by the ideal pulse width.
Maximum TCK Clock
Frequency
TDI to TCK, H or L
TDI to TCK, H or L
TMS to TCK, H or L
TMS to TCK, H or L
TCK Pulse Width, H or L
TRST Pulse Width, L
Recovery Time, TRST to
TCK
CHL
and t
are Guranteed by Statistical Analysis (GBSA). Please see Figure 3 for a graphical representation.
Parameter
RNMI-RIGHT
are a measure of how much phase noise (jitter) the deserializer can tolerate in the incoming data stream before bit errors occur.
DSR1
R
is the time required for the deserializer to indicate lock upon power-up or when leaving the power-down mode.
L
= 500Ω, C
CCXR
Conditions
) is higher than previous six channel devices because previous devices asserted ROUTn and RCLKn
L
= 35 pF
DSR1
and t
4
DSR2
are specified with the REFCLK running and stable, and specific conditions
25.0
10.0
Min
2.0
1.0
2.5
1.0
2.5
2.0
50.0
Typ
Max
Units
MHz
ns
ns
ns
ns
ns
ns
ns