TEA5768HL/V2 STEricsson, TEA5768HL/V2 Datasheet - Page 12

• Manufacturer Part Number: TEA5768HL/V2
• Manufacturer: STEricsson

Specifications of TEA5768HL/V2

• Lead Free Status / RoHS Status: Supplier Unconfirmed

NXP Semiconductors
6. Functional description
SAA7133HL_2
Product data sheet
6.1 Overview of internal functions
The SAA7133HL is able to capture TV signals over the PCI-bus in personal computers by
a single chip (see
The SAA7133HL incorporates two 9-bit video ADCs and the entire decoding circuitry of
any analog TV signal: NTSC, PAL and SECAM, including non-standard signals, such as
playback from a VCR. The adaptive multi-line comb filter provides superb picture quality,
component separation, sharpness and high bandwidth. The video stream can be cropped
and scaled to the needs of the application. Scaling down as well as zooming up is
supported in the horizontal and vertical direction, and an adaptive filter algorithm prevents
aliasing artifacts. With the acquisition unit of the scaler two different ‘tasks’ can be defined,
e.g. to capture video to the CPU for compression, and write video to the screen from the
same video source but with different resolution, color format and frame rate.
The SAA7133HL contains TV sound stereo decoding from Sound IF (SIF), for the BTSC
and EIAJ stereo sound standards, FM and AM mono sound and also non-standard
signals. Baseband stereo audio sampling is also implemented, e.g. for capturing from a
camcorder or other external devices. The audio sampling rate can be locked to the video
frame rate to ensure synchronization (lip-sync) between the video and audio data flow,
e.g. for storage, compression or time shift viewing applications.
The SAA7133HL incorporates analog audio pass-through and support for the analog
audio loop back cable to the sound card function.
The decoded video streams are fed to the PCI-bus, and are also applied to a peripheral
streaming interface, in ITU, VIP or VMI format. A possible application extension is
on-board hardware MPEG compression, or other feature processing. The compressed
data as PS or TS is fed back through the peripheral interface, in parallel or serial format, to
be captured by the system memory through the PCI-bus. The Transport Stream (TS) from
a DTV/DVB channel decoder can be captured through the peripheral interface in the same
way.
Audio, video and transport streams are collected in a configurable FIFO with a total
capacity of 1 kB. The DMA controller monitors the FIFO filling degree and master-writes
the audio and video stream to the associated DMA channel. The virtual memory address
space (from OS) is translated into physical (bus) addresses by the on-chip hardware
Memory Management Unit (MMU).
The application of the SAA7133HL is supported by reference designs and a set of drivers
for the Windows operating system (Video for Windows and Windows Driver Model
compliant).
Figure
Rev. 02 — 18 February 2008
4).
PCI audio and video broadcast decoder
SAA7133HL
© NXP B.V. 2008. All rights reserved.
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