SSTUA32866EC/G-T NXP Semiconductors, SSTUA32866EC/G-T Datasheet - Page 15

• Manufacturer Part Number: SSTUA32866EC/G-T
• Manufacturer: NXP Semiconductors

Specifications of SSTUA32866EC/G-T

• Logic Family: SSTU
• Logical Function: Registered Buffer
• Number Of Elements: 1
• Number Of Bits: 25
• Number Of Inputs: 25
• Number Of Outputs: 25
• High Level Output Current: -8mA
• Low Level Output Current: 8mA
• Propagation Delay Time: 3ns
• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (max): 2V
• Operating Supply Voltage (min): 1.7V
• Clock-edge Trigger Type: Posit/Negat-Edge
• Polarity: Non-Inverting
• Technology: CMOS
• Frequency (max): 450(Min)MHz
• Mounting: Surface Mount
• Pin Count: 96
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
SSTUA32866_2
Product data sheet
Fig 9. Timing diagram for the second SSTUA32866 (1 : 2 Register B configuration) device used in pair;
(not used)
PAR_IN
RESET
QERR
(1) PAR_IN is driven from PPO of the first SSTUA32866 device.
DCS
CSR
PPO
Q14
D14
CK
CK
Q1
D1
to
to
(1)
C0 = 1, C1 = 1
CK to Q
t
PD
t
su
m
t
h
Rev. 02 — 26 March 2007
1.8 V DDR2-667 configurable registered buffer with parity
m + 1
CK to QERR
CK to PPO
t
t
PD
PD
t
su
m + 2
t
h
m + 3
SSTUA32866
CK to QERR
t
PD
© NXP B.V. 2007. All rights reserved.
m + 4
002aaa657
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