CP3BT26G18NEP/HAPB National Semiconductor, CP3BT26G18NEP/HAPB Datasheet - Page 51

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CP3BT26G18NEP/HAPB

Manufacturer Part Number
CP3BT26G18NEP/HAPB
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of CP3BT26G18NEP/HAPB

Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
128
Package Type
LQFP
Lead Free Status / RoHS Status
Not Compliant
11.0 Triple Clock and Reset
The Triple Clock and Reset module generates a 12 MHz
Main Clock and a 32.768 kHz Slow Clock from external
crystal networks or external clock sources. It provides vari-
ous clock signals for the rest of the chip. It also provides the
main system reset signal, a power-on reset function, Main
Figure 4. Triple Clock and Reset Module
51
Clock prescalers to generate two additional low-speed
clocks, and a 32-kHz oscillator start-up delay.
Figure 4 is block diagram of the Triple Clock and Reset mod-
ule.
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