STA320 STMicroelectronics, STA320 Datasheet - Page 30

• Manufacturer Part Number: STA320
• Manufacturer: STMicroelectronics

Specifications of STA320

• Operating Temperature (min): -20C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

STA320
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The mechanism for writing a set of coefficients to RAM provides a method of updating the five coefficients cor-
responding to a given biquad (filter) simultaneously to avoid possible unpleasant acoustic side-effects. When
using this technique, the 6-bit address would specify the address of the biquad b1 coefficient (e.g. 0, 5, 10, …,
20, … 35 decimal), and the STA320 will generate the RAM addresses as offsets from this base value to write
the complete set of coefficient data.
5.14.22User-Defined EQ
The STA320 provides the ability to specify four EQ filters (biquads) per each of the two input channels. The bi-
quads use the following equation:
Y[n] = 2(b
where Y[n] represents the output and X[n] represents the input. Multipliers are 24-bit signed fractional multipli-
ers, with coefficient values in the range of 800000h (-1) to 7FFFFFh (0.9999998808).
Coefficients stored in the User Defined Coefficient RAM are referenced in the following manner:
CxHy0 = b1/2
CxHy1 = b2
CxHy2 = -a1/2
CxHy3 = -a2
CxHy4 = b0/2
where x represents the channel and the y the biquad number. For example C2H41 is the b
fourth biquad for channel 2.
Additionally, the STA320 allows specification of a high-pass filter (processing channels 1 and 2) and a lo-pass
filter (processing channel 3) to be used for bass-management crossover when the XO setting is "000" (user-
defined).
Both of these filters when defined by the user (rather than using the preset crossover filters) are 2nd order filters
that use the biquad equation noted above. They are loaded into the C12H0-4 and C3Hy0-4 areas of RAM noted
in the table below.
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write bottom 8-bits of coefficient b2 in I
write top 8-bits of coefficient a1 in I
write middle 8-bits of coefficient a1 in I
write bottom 8-bits of coefficient a1 in I
write top 8-bits of coefficient a2 in I
write middle 8-bits of coefficient a2 in I
write bottom 8-bits of coefficient a2 in I
write top 8-bits of coefficient b0 in I
write middle 8-bits of coefficient b0 in I
write bottom 8-bits of coefficient b0 in I
write 1 to WA bit in I
= b
0
X[n] + b
0
/2)X[n] + 2(b
1
X[n-1] + b
1
2
/2)X[n-1] + b
C address 24h
2
X[n-2] - a
2
1
X[n-2] - 2(a
Y[n-1] - a
2
2
2
C address 1Bh
C address 1Eh
C address 21h
2
2
2
2
2
2
2
C address 1Ch
C address 1Fh
C address 22h
C address 1Ah
C address 1Dh
C address 20h
C address 23h
2
Y[n-2]
1
/2)Y[n-1] - a
2
Y[n-2]
2
coefficient in the