MC9328MXSCVP10R2 Freescale, MC9328MXSCVP10R2 Datasheet - Page 70

• Manufacturer Part Number: MC9328MXSCVP10R2
• Manufacturer: Freescale

Specifications of MC9328MXSCVP10R2

• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

1
2
3
Functional Description and Application Information
70
Ref
No.
27a STCK high to STXD high
27b STCK high to STXD low
15
16
17
18
19
20
21
22
23
24
25
26
28
29
30
31
32
33
34
All the timings for the SSI are given for a non-inverted serial clock polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have been inverted, all the timing remains valid by inverting
the clock signal STCK/SRCK and/or the frame sync STFS/SRFS shown in the tables and in the figures.
There are 2 set of I/O signals for the SSI module. They are from Port C primary function (pad 257 to pad 261) and Port B
alternate function (pad 283 to pad 288). When SSI signals are configured as outputs, they can be viewed both at Port C primary
function and Port B alternate function. When SSI signals are configured as inputs, the SSI module selects the input based on
FMCR register bits in the Clock controller module (CRM). By default, the input are selected from Port C primary function.
bl = bit length; wl = word length.
STCK/SRCK clock period
STCK/SRCK clock high period
STCK/SRCK clock low period
STCK high to STFS (bl) high
SRCK high to SRFS (bl) high
STCK high to STFS (bl) low
SRCK high to SRFS (bl) low
STCK high to STFS (wl) high
SRCK high to SRFS (wl) high
STCK high to STFS (wl) low
SRCK high to SRFS (wl) low
STCK high to STXD valid from high impedance
STCK high to STXD high impedance
SRXD setup time before SRCK low
SRXD hold time after SRCK low
SRXD setup before STCK falling
SRXD hold after STCK falling
SRXD setup before STCK falling
SRXD hold after STCK falling
Table 30. SSI (Port B Alternate Function) Timing Parameter Table (Continued)
Synchronous External Clock Operation (Port B Alternate Function
Parameter
Synchronous Internal Clock Operation (Port B Alternate Function
1
External Clock Operation (Port B Alternate Function
3
3
3
3
3
3
3
3
MC9328MXS Technical Data, Rev. 3
Minimum
10.60
17.90
18.81
92.8
27.1
61.1
18.9
9.23
1.14
1.14
–
–
–
–
–
–
–
–
0
0
0
1.8 ± 0.1 V
Maximum
29.07
20.75
21.32
29.75
92.8
92.8
92.8
92.8
92.8
92.8
92.8
92.8
–
–
–
–
–
–
–
–
–
2
Minimum
)
81.4
40.7
40.7
16.6
15.7
16.5
8.1
9.3
1.0
1.0
0
0
0
0
0
0
0
0
0
0
0
2
2
3.0 ± 0.3 V
)
)
Freescale Semiconductor
Maximum
81.4
81.4
81.4
81.4
81.4
81.4
81.4
81.4
25.5
18.2
18.7
26.1
–
–
–
–
–
–
–
–
–
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns