MC9328MXSCVP10R2 Freescale, MC9328MXSCVP10R2 Datasheet - Page 69

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MC9328MXSCVP10R2

Manufacturer Part Number
MC9328MXSCVP10R2
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9328MXSCVP10R2

Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9328MXSCVP10R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1
2
3
Freescale Semiconductor
Ref
No.
11a STCK high to STXD high
11b STCK high to STXD low
10
12
13
14
Ref No.
1
2
3
4
5
6
7
8
9
All the timings for the SSI are given for a non-inverted serial clock polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have been inverted, all the timing remains valid by inverting
the clock signal STCK/SRCK and/or the frame sync STFS/SRFS shown in the tables and in the figures.
There are 2 sets of I/O signals for the SSI module. They are from Port C primary function (pad 257 to pad 261) and Port B
alternate function (pad 283 to pad 288). When SSI signals are configured as outputs, they can be viewed both at Port C primary
function and Port B alternate function. When SSI signals are configured as input, the SSI module selects the input based on
status of the FMCR register bits in the Clock controller module (CRM). By default, the input are selected from Port C primary
function.
bl = bit length; wl = word length.
33
34
STCK/SRCK clock period
STCK high to STFS (bl) high
SRCK high to SRFS (bl) high
STCK high to STFS (bl) low
SRCK high to SRFS (bl) low
STCK high to STFS (wl) high
SRCK high to SRFS (wl) high
STCK high to STFS (wl) low
SRCK high to SRFS (wl) low
STCK high to STXD valid from high impedance
STCK high to STXD high impedance
SRXD setup time before SRCK low
SRXD hold time after SRCK low
SRXD setup before STCK falling
SRXD hold after STCK falling
Table 29. SSI (Port C Primary Function) Timing Parameter Table (Continued)
Table 30. SSI (Port B Alternate Function) Timing Parameter Table
Parameter
Synchronous External Clock Operation (Port C Primary Function
1
Parameter
Internal Clock Operation
3
3
3
3
3
3
3
3
MC9328MXS Technical Data, Rev. 3
1
Minimum
(Port B Alternate Function
14.93
12.43
3.08
1.25
1.71
3.08
1.25
1.25
2.51
-0.1
-0.1
1.7
95
20
0
Minimum
1.8 ± 0.1 V
1.14
0
1.8 ± 0.1 V
Maximum
Functional Description and Application Information
16.19
14.59
5.24
2.28
4.79
5.24
2.28
3.42
3.99
4.8
1.0
1.0
Maximum
2
Minimum
)
Minimum
83.3
13.1
10.9
17.5
-0.1
-0.1
1.5
2.7
1.1
1.5
2.7
1.1
1.1
2.2
0
2
1.0
0
)
3.0 ± 0.3 V
3.0 ± 0.3 V
Maximum
Maximum
14.2
12.8
4.2
1.0
4.6
2.0
4.2
1.0
4.6
2.0
3.0
3.5
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
69

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