TS68882VR16 E2V, TS68882VR16 Datasheet
TS68882VR16
Specifications of TS68882VR16
Related parts for TS68882VR16
TS68882VR16 Summary of contents
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... TS68000 Family, the TS68882 can be used with any of the MPU devices of the TS68000 Family, and it may also be used as a peripheral to non-TS68000 processors. e2v semiconductors SAS 2007 CMOS Enhanced Floating-point Co-processor from -55°C to +125°C c TS68882 Visit our website: www.e2v.com for the latest version of the datasheet 0852B–HIREL–06/07 ...
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... The TS68882 is a high-performance floating-point device designed to interface with the TS68020 or TS68030 as a co-processor. This device fully supports the TS68000 virtual machine architecture, and is implemented in HCMOS, e2v’s low power, small geometry process. This process allows CMOS and HMOS (high-density NMOS) gates to be combined on the same device. CMOS structures are used where speed and low power is required, and HMOS structures are used where minimum silicon area is desired ...
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... The MCU contains the clock generator, a two-level microcoded sequencer that controls the ECU, the microcode ROM, and self-test circuitry. The built-in self-test capabilities of the TS68882 enhance reliabil- ity and ease manufacturing requirements; however, these diagnostic functions are not available to the user. e2v semiconductors SAS 2007 TS68882 3 0852B–HIREL–06/07 ...
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... Figure 1-1. TS68882 Simplified Block 4 0852B–HIREL–06/07 TS68882 e2v semiconductors SAS 2007 ...
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... Pin Assignments Figure 2-1. PGA Terminal Designation e2v semiconductors SAS 2007 * Reserved for future ATMEL-Grenoble use TS68882 5 0852B–HIREL–06/07 ...
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... The term assert or assertion is used to indicate that a signal is active or true, independent of whether that level is represented by a high or low voltage. The term negate or nega- tion is used to indicate that a signal is inactive or false. 6 0852B–HIREL–06/07 TS68882 Figure 2-3. e2v semiconductors SAS 2007 ...
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... Design and Construction 3.3.1 Terminal Connections Depending on the package, the terminal connections shall be as shown in ure 2-2 on page 3.3.2 Lead Material and Finish Lead material and finish shall be any option of MIL-STD-1835. e2v semiconductors SAS 2007 Mnemonic Input/Output Input D0 - D31 Input/Output SIZE ...
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... Min Max -0.3 +7.0 -0.3 +7.0 = -55°C to 0.75 -55 +125 -40 +85 -55 +150 +270 Table Min Max 4.5 5.5 -55 +125 2 GND - 0.3 0 2.4 0.5 500 0.75 20 130 e2v semiconductors SAS 2007 TS68882 Unit °C °C °C °C 2-1). Unit V ° µA µ µ ...
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... Thus, good thermal management on the part of the user can significantly reduce approximately equals junction temperature. 6.1 Mechanical and Environmental The microcircuits shall meet all mechanical environmental requirements of either MIL-STD-883 for class B devices. e2v semiconductors SAS 2007 in °C can be obtained from Watts - Chip Internal Power < P and can be neglected ...
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... Tc = -55/+125°C or -40/+85°C DC (1) = -400 µA) DSACK0, DSACK1, D0-D31 (1) = 5.3 mA) DSACK0, DSACK1, D0-D31 = GND) SENSE “Test Load” on page 14 hereafter of this specifica- Min Max 2 GND - 0.3 0 2.4 0.5 500 e2v semiconductors SAS 2007 TS68882 Unit V V µA µ µA ...
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... Timing measurements are referenced to and from a low voltage of 0.8V and a high voltage of 2.0V, unless otherwise noted. The voltage swing through this range should start outside, and pass through, the range such that the rise of fall will be linear between 0.8V and 2.0V. e2v semiconductors SAS 2007 ; Tc = -55/+125°C or -40/+85° 5.5V ...
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... DSACK0 or DSACK1 asserted to data-out 20 valid 12 0852B–HIREL–06/07 ( -55°C/+125° -40°C/+85°C (see DC; Figure 7-6 on page 18) 16.67 MHz Min Max Min ( ( ( ( ( ( -15 15 -10 50 Figure 7-4 on page 20 MHz 25 MHz 33.33 MHz Max Min Max Min - e2v semiconductors SAS 2007 TS68882 16, Max Unit ...
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... These specifications replace the old specifications 8 and 8A (the old specifications implied that in all cases, transi- tions in CS must not occur simultaneously with transitions DS. This is not a requirement of the TS68882). e2v semiconductors SAS 2007 Tc = -55°C/+125° -40°C/+85°C (see DC; ...
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... Finally, the measurement for signal-to-signal specifications are also shown. Note that the testing levels used to verify conformance to the AC specifications does not affect the guar- anteed DC operation of the device specified in the DC electrical characteristics. 14 0852B–HIREL–06/07 Figure 7-2. TS68882 Table 4-1, referring to Figure 7-3 on page 15. Figure e2v semiconductors SAS 2007 ...
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... This input timing is applicable to all parameters specified relative to the rising edge of the clock. 4. This input timing is applicable to all parameters specified relative to the falling edge of the clock. 5. This timing is applicable to all parameters specified relative to the assertion/negation of another signal. e2v semiconductors SAS 2007 TS68882 15 ...
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... Figure 7-4. Asynchronous Read Cycle Timing Diagram is actually a logical condition, but is shown as an active signal for clarity. The logical Note: START equation for this signal is: 16 0852B–HIREL–06/07 START = (R/W · DS). TS68882 e2v semiconductors SAS 2007 ...
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... Figure 7-5. Asynchronous Write Cycle Timing Diagram Note: START is actually a logical condition, but is shown as an active signal for clarity. The logical equation for this signal is: START = (R/W · DS). e2v semiconductors SAS 2007 TS68882 17 0852B–HIREL–06/07 ...
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... START = (R/W · DS). 7.4 Additional Information Additional information shall not be for any inspection purposes. 7.4.1 Capacitance (Not for Inspection Purposes) Symbol 0852B–HIREL–06/07 Parameter Test Conditions 25°C IN amb Input Capacitance MHz TS68882 Min Max Unit 20 pF e2v semiconductors SAS 2007 ...
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... A 32-bit control register that contains enable bits for each class of exceptions trap, and mode bits to set the user-selectable rounding and precision modes e2v semiconductors SAS 2007 Figure 8-1 on page 20 through 15, and consists of the 0852B– ...
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... TS68882 is based upon a chip select (CS), which is decoded from the TS68020/TS68030 function codes and address bus. Figure 8-1. TS68882 Programming Model Figure 8-2. Exception Status/Enable Byte 20 0852B–HIREL–06/07 Figure 8-7 illustrates the TS68882/TS68020 or TS68030 configuration. TS68882 e2v semiconductors SAS 2007 ...
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... Figure 8-3. Mode Control Byte 7 PREC Figure 8-4. Condition Code Byte Figure 8-5. Quotient Byte Figure 8-6. Accrued Exception Byte e2v semiconductors SAS 2007 RND TS68882 1 0 ROUNDING MODE NEAREST 01 TOWARD ZERO 10 TOWARD MINUS INFINITY 11 TOWARD PLUS INFINITY ROUNDING PRECISION: 00 extended ...
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... Since the co-processor interface protocol is based solely on bus transfers, the protocol is easily emu- lated by software when the TS68882 is used as a peripheral with any processor capable of memory- mapped I/O over on TS68000 style bus. 22 0852B–HIREL–06/07 TS68882 e2v semiconductors SAS 2007 ...
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... Thus the size of the saved internal state is kept to a minimum. The ability to utilize several internal state sizes greatly reduces the average context switching time. e2v semiconductors SAS 2007 TS68882 23 ...
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... Table 8-1. Exponent and Mantissa Sizes Data Format Single Double Extended 24 0852B–HIREL–06/07 Table 8-1 lists the exponent and mantissa size for single, double, and extended Exponent Bits Mantissa Bits TS68882 Bias 23 (+1) 127 52 (+1) 1023 64 16383 e2v semiconductors SAS 2007 ...
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... All data used in an operation is converted to extended precision by the TS68882 before the specific operation is performed, and all results are in extended pre- cision. This ensures accuracy without sacrificing performance. Refer to Figure 8-8 TS68882. e2v semiconductors SAS 2007 # 3.FP0 D2.FP3 BIGINT.FP7 # 3.14159.FP5 (SP) + .FP6 [(TEMP -PTR ...
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... Implicit binary point 80 67 17-Digit Zero* Mantissa Implicit decimal point bits Byte integer bits Word integer bits Long integer 8-bit 23-bit Single real Exp. Fraction Sign of fraction 0 52-bit Double real Fraction 0 64-bit Extended real 0 Packed decimal real e2v semiconductors SAS 2007 TS68882 ...
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... FSQRT.(fmt) FSQRT.X FSQRT.X The TS68882 monadic operations available are as follows: FABS FACOS FASIN FATAN FATANH e2v semiconductors SAS 2007 (ea).FPn Move to TS68882 FPm.(ea) Move from TS68882 FPm.FPn Move within TS68882 (ea), FP0-FP3/FP7 FP2/FP4/FP6,(ea) (ea), FPN or, FPm, FPn or, ...
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... Log Base 10 Log Base 2 Log Base e Log Base e of Negate Sine Simultaneous Sine and Cosine Hyperbolic Sine Square Root Tangent Hyperbolic Tangent 10 to the x Power test 2 to the x Power (ea).FPnor, FPm.FPn Add Compare Divide Modulo Remainder TS68882 e2v semiconductors SAS 2007 ...
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... Note: The following conditional tests do not set the BSUN bit in the status register exception byte under any circumstances OGT OGE OLT OLE OGL OR UN UEQ UGT e2v semiconductors SAS 2007 Add Multiply IEEE Remainder Scale Exponent Single Precision Divide Single Precision Multiply Subtract Branch Decrement and Branch Set Byte According to Condition Trap-on Condition (with an Optional ...
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... Not (Greater or Less) Not (Less or Equal) Not (Less Than) Not (Greater or Equal) Not (Greater Than) Signaling Not Equal Signaling True Move to Control Register(s) Move from Control Register(s) No Operation Virtual Machine State Save Virtual Machine State Restore TS68882 e2v semiconductors SAS 2007 ...
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... A0 and SIZE pins are strapped high and/or low as listed in Table 8-4. Table 8-3. Co-processor Interface Register Selection A4-A0 0000x 0001x 0010x 0011x 0100x 0101x 0110x 0111x 100xx 1010x e2v semiconductors SAS 2007 Offset Width S00 16 S02 16 S04 16 S06 16 S08 16 S0A 16 S0C 16 ...
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... TS68882, and a logic low (0) indicates a write to the TS68882. The R/W signal must be valid when AS is asserted. 32 0852B–HIREL–06/07 Offset Width S16 16 S18 32 S1C 32 Size Low High High TS68882 Type Register - (Reserved) Read Instruction Address R/W Operand Address Data bus 8-bit 16-bit 32-bit Table 8-4. e2v semiconductors SAS 2007 ...
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... When performing a power-up reset, external circuitry should keep the RESET line asserted to a mini- mum of four clock cycles after V when power is applied. For compatibility with all TS68000 Family devices, 100 milliseconds should be used as the minimum. e2v semiconductors SAS 2007 Table 8-5 to inform the TS68020/TS68030 of valid data on D16 - D31 instead of D0-D15. A4 ...
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... DSACK0 pin since the TS68882 never asserts it in this configuration. 34 0852B–HIREL–06/07 has been within tolerance for more than the initial TS68882 or GND. CC e2v semiconductors SAS 2007 ...
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... Thus, the CS decode logic for such systems may be the same TS68020/TS68030 systems, such that the TS68882 will not use any part of the data address spaces. Figure 8-9. 32-bit Data Bus co-processor Connection e2v semiconductors SAS 2007 , and the A0 pin is connected to GND. The sixteen least significant data pins (D0- CC TS68882 35 0852B– ...
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... Figure 8-10. 16-bit Data Bus co-processor Connection Figure 8-11. 8-bit Data Bus Co-processor Connection 36 0852B–HIREL–06/07 TS68882 GND GND e2v semiconductors SAS 2007 ...
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... Figure 8-12. 16-bit Data Bus Peripheral Processor Connection Figure 8-13. 8-bit Data Bus Peripheral Processor Connection e2v semiconductors SAS 2007 TS68882 37 0852B–HIREL–06/07 ...
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... CS must be decoded in the supervisor or user data spaces. 9. Preparation For Delivery 9.1 Certificate of Compliance e2v-Grenoble offers a certificate of compliance with each shipment of parts, affirming the products are in compliance with MIL-STD-883 and guaranteeing the parameters are tested at extreme temperatures for the entire temperature range. 10. Handling Devices must be handled with certain precautions to avoid damage due to accumulation of static charge ...
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... Figure 11-1. 68-lead CPGA Notes: 1. Dimensions A and B are datums and T S datum surface. 2. Positional tolerance for leads 168 places: 0,13 0,005 T, A (5)|B (5) 3. Dimensioning and tolerancing per AN5I Y14 5M 1982. 4. Controlling dimension: INCH. e2v semiconductors SAS 2007 TS68882 39 0852B–HIREL–06/07 ...
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... Figure 11-2. 68-lead CQFP 40 0852B–HIREL–06/07 TS68882 e2v semiconductors SAS 2007 ...
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... For availability of the different versions, contact your local e2v sales office. 2. The letter X in the part number designates a "Prototype" product that has not been qualified by e2v. Reliability of a PCX part- number is not guaranteed and such part-number shall not be used in Flight Hardware. Product changes may still occur while shipping prototypes ...
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... Document Revision History Table 13-1 provides a revision history for this hardware specification. Table 13-1. Document Revision History Revision Number Date B 06/2007 A 04/2002 42 0852B–HIREL–06/07 Substantive Change(s) Name change from Atmel to e2v Ordering information update Initial revision TS68882 e2v semiconductors SAS 2007 ...
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... Whilst e2v has taken care to ensure the accuracy of the information contained herein it accepts no responsibility for the consequences of any use thereof and also reserves the right to change the specification of goods without notice. e2v accepts no liability beyond that set out in its stan- dard conditions of sale in respect of infringement of third party patents arising from the use of tubes or other devices in accordance with informa- tion contained herein ...