PSD813F2-A-70J STMicroelectronics, PSD813F2-A-70J Datasheet - Page 17

• Manufacturer Part Number: PSD813F2-A-70J
• Manufacturer: STMicroelectronics

Specifications of PSD813F2-A-70J

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: PLCC
• Mounting: Surface Mount
• Pin Count: 52
• Lead Free Status / RoHS Status: Compliant

PSD8XXFX
Table 3.
Pin name
PC3
PC4
PC5
PC6
PC7
PD0
PD1
PLCC52 pin description
Pin
17
14
13
12
11
10
9
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
PC3 pin of port C. This port pin can be configured to have the following functions:
MCU I/O – write to or read from a standard output or input port.
CPLD macrocell (McellBC3) output.
Input to the PLDs.
TSTAT output
Ready/Busy output for parallel in-system programming (ISP).
This pin can be configured as a CMOS or Open Drain output.
PC4 pin of port C. This port pin can be configured to have the following functions:
MCU I/O – write to or read from a standard output or input port.
CPLD macrocell (McellBC4) output.
Input to the PLDs.
TERR output
This pin can be configured as a CMOS or Open Drain output.
PC5 pin of port C. This port pin can be configured to have the following functions:
MCU I/O – write to or read from a standard output or input port.
CPLD macrocell (McellBC5) output.
Input to the PLDs.
TDI input
This pin can be configured as a CMOS or Open Drain output.
PC6 pin of port C. This port pin can be configured to have the following functions:
MCU I/O – write to or read from a standard output or input port.
CPLD macrocell (McellBC6) output.
Input to the PLDs.
TDO output
This pin can be configured as a CMOS or Open Drain output.
PC7 pin of port C. This port pin can be configured to have the following functions:
MCU I/O – write to or read from a standard output or input port.
CPLD macrocell (McellBC7) output.
Input to the PLDs.
DBE – active low Data Byte Enable input from 68HC912 type MCUs.
This pin can be configured as a CMOS or Open Drain output.
PD0 pin of port D. This port pin can be configured to have the following functions:
ALE/AS input latches address output from the MCU.
MCU I/O – write or read from a standard output or input port.
Input to the PLDs.
CPLD output (External Chip Select).
PD1 pin of port D. This port pin can be configured to have the following functions:
MCU I/O – write to or read from a standard output or input port.
Input to the PLDs.
CPLD output (External Chip Select).
CLKIN – clock input to the CPLD macrocells, the APD Unit’s Power-down counter, and
the CPLD AND Array.
(2)
(2)
for the JTAG Serial Interface.
(2)
(2)
for the JTAG Serial Interface.
(1)
for the JTAG Serial Interface.
for the JTAG Serial Interface.
(continued)
Doc ID 7833 Rev 7
Description
Pin description
17/128