ISP1181BBSUM STEricsson, ISP1181BBSUM Datasheet - Page 33

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ISP1181BBSUM

Manufacturer Part Number
ISP1181BBSUM
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1181BBSUM

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Compliant
Table 31.
CD00222684
Product data sheet
Bit
Symbol
Reset
Access
Endpoint Status Register: bit allocation
12.2.2 Read Endpoint Status
EPSTAL
R
7
0
Table 29.
Table 30.
Remark: There is no protection against writing or reading past a buffer’s boundary,
against writing into an OUT buffer or reading from an IN buffer. Any of these actions could
cause an incorrect operation. Data residing in an OUT buffer are only meaningful after a
successful transaction. Exception: during DMA access of a double-buffered endpoint, the
buffer pointer automatically points to the secondary buffer after reaching the end of the
primary buffer.
This command is used to read the status of an endpoint FIFO. The command accesses
the Endpoint Status Register, the bit allocation of which is shown in
Endpoint Status Register will clear the interrupt bit set for the corresponding endpoint in
the Interrupt Register (see
All bits of the Endpoint Status Register are read-only. Bit EPSTAL is controlled by the
Stall/Unstall commands and by the reception of a SETUP token (see
Code (Hex): 50 to 5F — read (control OUT, control IN, endpoint 1 to 14)
Transaction — read 1 byte
A0
1
0
0
0
0
0
0
A0
1
0
0
0
EPFULL1
R
6
0
Phase
command
data
data
data
data
data
data
Phase
command
data
data
data
Example of endpoint FIFO access (8-bit bus width)
Example of endpoint FIFO access (16-bit bus width)
EPFULL0
R
5
0
Rev. 05 — 25 August 2010
Bus lines
D[7:0]
D[7:0]
D[7:0]
D[7:0]
D[7:0]
D[7:0]
D[7:0]
Bus lines
D[7:0]
D[15:8]
D[15:0]
D[15:0]
D[15:0]
Table
DATA_PID
R
4
0
48).
Byte #
-
0
1
2
3
4
5
Word #
-
-
0
1
2
WRITE
OVER
R
3
0
Full-speed USB peripheral controller
Description
command code (00H to 1FH)
packet length (lower byte)
packet length (upper byte)
data byte 1
data byte 2
data byte 3
data byte 4
Description
command code (00H to 1FH)
ignored
packet length
data word 1 (data byte 2, data byte 1)
data word 2 (data byte 4, data byte 3)
SETUPT
R
2
0
CPUBUF
Table
© ST-ERICSSON 2010. All rights reserved.
ISP1181B
Section
R
1
0
31. Reading the
12.2.3).
reserved
R
0
0
33 of 68

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