M66291GP#201 Renesas Electronics America, M66291GP#201 Datasheet - Page 49

• Manufacturer Part Number: M66291GP#201
• Description: IC USB CONTROLLER GEN-PUR 48LQFP
• Manufacturer: Renesas Electronics America

Specifications of M66291GP#201

• Package / Case: 48-LQFP
• Mounting Type: Surface Mount
• Current - Supply: 30mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -20°C ~ 85°C
• Interface: Serial
• Controller Type: USB 2.0 Controller
• Lead Free Status / RoHS Status: Not Compliant

M 6 6 2 9 1 G P / H P
R e v 1 . 0 1
(1) EP0_PID (Response PID) Bits (b15~b14)
These bits set the PID for response to the host at data/status stage of the control transfer.
At setup stage, the ACK response is executed irrespective of these bits.
Writing these bits are ignored when the VALID bit is equal to“1”.
When these bits are set to “00”
When these bits are set to “01”
<When set to control write transfer (ISEL bit = “0”)>
<When set to control read transfer (ISEL bit = “1”)>
When these bits are set to “1x”
The NAK response is not executed even if these bits are set to “00” when the data is being received at data
stage. The settings of these bits are reflected from the next transaction.
Similarly, the transmission is not interrupted even if these bits are set to “00” when the data is being
transmitted at data stage.
Further, these bits are automatically set to the values below when the following states occur:
2 0 0 4 . 1 1 . 0 1
When setup token is received
When the request set to automatic response (SET_ADDRESS or SET_CONFIGURATION) is received
When sequence error occurs (CTSQ bits are set to “110”)
• Data stage
• Status stage
• Data stage
•Status stage
• Data stage
•Status stage
• Data stage
• Status stage
The CCPL bit also is automatically set to “1” and transmits the zero-length packet at the succeeding
status stage (IN transaction).
• "00" (NAK)
• "01" (BUF)
• "1x" (STALL)
p a g e 4 9 o f 1 2 2
: ACK response after receiving the data if the SIE side buffer can be ready to
: NAK response if the SIE side buffer is not ready to receive
: Depends on CCPL bit
: Transmits the data if the SIE side buffer is not ready to transmit
: NAK response if the SIE side buffer is not ready to transmit
: Depends on CCPL bit
: STALL response
: STALL response
: NAK response
: NAK response
receive
In case the SIE side buffer is not ready to receive, the EPB_NRD bit is
set to “1” when OUT token is received.
In case the SIE side buffer is not ready to transmit, the EPB_NRD bit is
set to “1” when IN token is received.
In case the SIE side buffer is not ready to receive/transmit, the
EPB_NRD bit is set to “1” when OUT token is received.